Design and Analysis of Dual Modulus Prescaler Circuit for Frequency Synthesizer. - Suraj Kumar Saw; Madhusudan Maiti; Preetisudha Meher (iSES, 2019)

Variation Aware Design of 50-Gbit/s, 5.027-fJ/bit Serializer Using Latency Combined Mux-Dual Latch for Inter-Chip Communication. - Alak Majumder; Monalisa Das; Suraj Kumar Saw; Abir J. Mondal; Bidyut K. Bhattacharyya (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)