Accelerating FPGA development through the automatic parallel application of standard implementation tools. - Athira Chandrasekharan; Sureshwar Rajagopalan; Guruprasad Subbarayan; Tony Frangieh; Yousef Iskander; Stephen D. Craven; Cameron D. Patterson (FPT, 2010)

Using partial reconfiguration and high-level models to accelerate FPGA design validation. - Yousef Iskander; Stephen D. Craven; Athira Chandrasekharan; Sureshwar Rajagopalan; Guruprasad Subbarayan; Tannous Frangieh; Cameron D. Patterson (FPT, 2010)

PATIS: Using partial configuration to improve static FPGA design productivity. - Tannous Frangieh; Athira Chandrasekharan; Sureshwar Rajagopalan; Yousef Iskander; Stephen D. Craven; Cameron D. Patterson (IPDPS Workshops, 2010)