Design of Dependable Task Scheduling Algorithm in Cloud Environment. - Suruchi Sharma; Pratyay Kuila (WCI, 2015)

Performance analysis of Pocket Doped Junction-Less TFET. - Sneha Bharti; Suruchi Sharma; Abhishek Verma; Manisha Bharti; Baljit Kaur (ISDCS, 2020)

Design of Tunnel Junction Engineered Dopingless TFET for Low power Applications. - Abhishek Verma; Suruchi Sharma; Sneha Bharti; Manisha Bharti; Baljit Kaur (ISDCS, 2020)

Performance investigation of asymmetric double-gate doping less tunnel FET with Si/Ge heterojunction. - Suruchi Sharma; Baljit Kaur (IET Circuits Devices Syst., 2020)

DC and linearity performance of a novel Si0.6Ge0.4/Ge Dopingless Tunnel FET for ultra-low voltage applications. - Suruchi Sharma; Rikmantra Basu; Baljit Kaur (ISDCS, 2021)

Performance Investigation of a Si/Ge Heterojunction Asymmetric Double Gate DLTFET Considering Temperature and ITC Variations. - Suruchi Sharma; Rikmantra Basu; Baljit Kaur (ISQED, 2021)

Interface trap charges associated reliability analysis of Si/Ge heterojunction dopingless TFET. - Suruchi Sharma; Rikmantra Basu; Baljit Kaur (IET Circuits Devices Syst., 2021)

Controllability-Constrained Deep Network Models for Enhanced Control of Dynamical Systems. - Suruchi Sharma; Volodymyr Makarenko; Gautam Kumar; Stas Tiomkin (ACC, 2024)