SPICE Simulation of SOI MOSFET Integrated Circuits. - Surya Veeraraghavan; Jerry G. Fossum; William R. Eisenstadt (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

Model selection for SOI MOSFET circuit simulation. - Jerry G. Fossum; Surya Veeraraghavan; Dan Fitzpatrick (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

SP-SOI: a third generation surface potential based compact SOI MOSFET Model. - Weimin Wu 004; Xin Li; Hailing Wang; Gennady Gildenblat; Glen O. Workman; Surya Veeraraghavan; Colin C. McAndrew (CICC, 2005)

PSP-SOI: A Surface Potential Based Compact Model of Partially Depleted SOI MOSFETs. - Weimin Wu 004; Xin Li; Gennady Gildenblat; Glen O. Workman; Surya Veeraraghavan; Colin C. McAndrew; Ronald van Langevelde; Geert D. J. Smit; Andries J. Scholten; Dirk B. M. Klaassen; Josef Watts (CICC, 2007)