Split-Precharge Differential Noise-Immune Threshold Logic Gate (SPD-NTL). - Suryanarayana Tatapudi; Valeriu Beiu (IWANN (2), 2003)

A charge recycling differential noise immune perceptron. - Jabulani Nyathi; Valeriu Beiu; Suryanarayana Tatapudi; David J. Betowski (IJCNN, 2004)

A Pipelined Multiplier Using A Hybrid Wave-Pipelining Scheme. - Suryanarayana Tatapudi; José G. Delgado-Frias (CDES, 2005)

A High Performance Hybrid Wave-Pipelined Multiplier. - Suryanarayana Tatapudi; José G. Delgado-Frias (ISVLSI, 2005)

Decoupled dynamic ternary content addressable memories. - José G. Delgado-Frias; Jabulani Nyathi; Suryanarayana Tatapudi (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A mesochronous pipeline scheme for high performance low power digital systems. - Suryanarayana Tatapudi; José G. Delgado-Frias (ISCAS, 2006)

A mesochronous pipelining scheme for high-performance digital systems. - Suryanarayana Tatapudi; José G. Delgado-Frias (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)