A simple wide-band compact model and parameter extraction using particle swarm optimization of on-chip spiral inductors for silicon RFICs. - Sushanta K. Mandal; Arijit De; Amit Patra; Shamik Sural (ACM Great Lakes Symposium on VLSI, 2005)

A Wide-Band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design. - Sushanta K. Mandal; Arijit De; Amit Patra; Shamik Sural (VLSI Design, 2006)

ANN- and PSO-Based Synthesis of On-Chip Spiral Inductors for RF ICs. - Sushanta K. Mandal; Shamik Sural; Amit Patra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design. - Abhishek Pathak; Sushanta K. Mandal; Raj Kumar Nagpal; Rakesh Malik (DELTA, 2010)

A 6 bit 800MHz TIADC Based on Successive Approximation in 65nm Standard CMOS Process. - Arunkumar Salimath; Chandrajit Debnath; Kallol Chatterjee; Sushanta K. Mandal (VLSI Design, 2010)

A FinFET-Based Low Leakage 10T Static Random Access Memory Cell. - Anandita Srivastav; Usha Tiwari; Sushanta K. Mandal; Ashish Sachdeva (J. Circuits Syst. Comput., 2025)