A simulation environment for design space exploration for asymmetric 3D-Network-on-Chip. - Jan Moritz Joseph; Sven Wrieden; Christopher Blochwitz; Alberto García Ortiz; Thilo Pionteck (ReCoSoC, 2016)

Design method for asymmetric 3D interconnect architectures with high level models. - Jan Moritz Joseph; Lennart Bamberg; Sven Wrieden; Dominik Ermel; Alberto García Ortiz; Thilo Pionteck (ReCoSoC, 2017)