On multilevel circuit partitioning. - Sverre Wichlund (ICCAD, 1998)

On efficient CPU-usage in a VLSI CAD-environment with application to circuit partitioning. - Sverre Wichlund; Einar J. Aas (ICECS, 2000)

Achieving design closure in a typical mixed-signal ASIC; a Design-For-Test centric approach. - Sverre Wichlund (ICECS, 2005)

Reducing Scan Test Data Volume and Time: A Diagnosis Friendly Finite Memory Compactor. - Sverre Wichlund; Einar J. Aas (ATS, 2006)

Reducing ATE Bandwidth and memory requirements: A diagnosis friendly scan test response compactor. - Sverre Wichlund; Frank Berntsen; Einar J. Aas (DFT, 2006)

Scan Test Response Compaction Combined with Diagnosis Capabilities. - Sverre Wichlund; Frank Berntsen; Einar J. Aas (J. Electron. Test., 2008)