Optimal Memory Address Seeds for Pattern Sensitive Faults Detection. - S. V. Yarmolik; Bartosz Sokol (DDECS, 2006)

Address Sequences for March Tests to Detect Pattern Sensitive Faults. - Bartosz Sokol; S. V. Yarmolik (DELTA, 2006)

Address Sequences Generation for Multiple Run Memory Testing. - S. V. Yarmolik; Ireneusz Mrozek; Bartosz Sokol (CISIM, 2007)

Generation of address sequences for effective random access memory testing. - S. V. Yarmolik (Autom. Control. Comput. Sci., 2007)

Determination of the optimal initial states for multiple-run RAM testing. - S. V. Yarmolik; Alexander N. Kurbatski; V. N. Yarmolik (Autom. Control. Comput. Sci., 2008)

Address Sequences and Backgrounds with Different Hamming Distances for Multiple Run March Tests. - Svetlana V. Yarmolik (Int. J. Appl. Math. Comput. Sci., 2008)

Nondestructive RAM testing based on multiple signature comparison. - S. V. Yarmolik; V. N. Yarmolik (Autom. Control. Comput. Sci., 2009)

Generalized adaptive signature analysis. - S. V. Yarmolik; Vyacheslav N. Yarmolik (Autom. Control. Comput. Sci., 2010)

The synthesis of probability tests with a small number of kits. - S. V. Yarmolik; V. N. Yarmolik (Autom. Control. Comput. Sci., 2011)

Analyses of two run march tests with address decimation for BIST procedure. - Ireneusz Mrozek; Svetlana V. Yarmolik (EWDTS, 2013)

Generating modified Sobol sequences for multiple run march memory tests. - V. N. Yarmolik; S. V. Yarmolik (Autom. Control. Comput. Sci., 2013)

Address sequences. - Vyacheslav N. Yarmolik; Svetlana V. Yarmolik (Autom. Control. Comput. Sci., 2014)

Controlled method of random test synthesis. - Vyacheslav N. Yarmolik; Ireneusz Mrozek; Svetlana V. Yarmolik (Autom. Control. Comput. Sci., 2015)