A novel thread scheduler design for polymorphic embedded systems. - Viswanath Krishnamurthy; Swamy D. Ponpandi; Akhilesh Tyagi (CASES, 2011)

Partial reconfiguration logic synthesis by temporal slicing. - Swamy D. Ponpandi; Akhilesh Tyagi (FPT, 2011)

User satisfaction aware routing decisions in NOC. - Swamy D. Ponpandi; Akhilesh Tyagi (NoCArc@MICRO, 2013)

PolyNOC - A polymorphic thread simulator for NoC communication based embedded systems. - Swamy D. Ponpandi; Zhang Zhang; Akhilesh Tyagi (ReConFig, 2013)

An Evaluation of User Satisfaction Driven Scheduling in a Polymorphic Embedded System. - Zhang Zhang; Swamy D. Ponpandi; Akhilesh Tyagi (IPDPS Workshops, 2014)

User satisfaction aware routing and energy modeling of polymorphic network on chip architecture. - Swamy D. Ponpandi; Akhilesh Tyagi (Comput. Electr. Eng., 2014)

A placer for composable FPGA with 2D mesh network. - Ka-Ming Keung; Swamy D. Ponpandi; Akhilesh Tyagi (Int. J. Embed. Syst., 2014)

Dynamic Data Shapers Optimize Performance in Dynamic Binary Optimization (DBO) Environment. - Varun Venkatesan; Swamy D. Ponpandi; Akhilesh Tyagi (iNIS, 2015)

Shaping data for application performance and energy optimization in dynamic data view framework. - Varun Venkatesan; Swamy D. Ponpandi; Akhilesh Tyagi (Integr., 2017)