A Novel Method for Silicon Configurable Test Flow and Algorithms for Testing, Debugging and Characterizing Different Types of Embedded Memories through a Shared Controller. - Swapnil Bahl (MTDT, 2004)

A Sharable Built-in Self-Repair for Semiconductor Memories with 2-D Redundancy Schema. - Swapnil Bahl (DFT, 2007)

Self-Programmable Shared BIST for Testing Multiple Memories. - Swapnil Bahl; Vishal Srivastava (ETS, 2008)

Low Power Test. - Swapnil Bahl; Rajiv Sarkar; Akhil Garg 001 (ITC, 2008)

Power Aware Shift and Capture ATPG Methodology for Low Power Designs. - Shray Khullar; Swapnil Bahl (Asian Test Symposium, 2011)

State of the art low capture power methodology. - Swapnil Bahl; Roberto Mattiuzzo; Shray Khullar; Akhil Garg 001; S. Graniello; Khader S. Abdel-Hafez; Salvatore Talluto 001 (ITC, 2011)

EDA solutions to new-defect detection in advanced process technologies. - Erik Jan Marinissen; Gilbert Vandling; Sandeep Kumar Goel; Friedrich Hapke; Jason Rivers; Nikolaus Mittermaier; Swapnil Bahl (DATE, 2012)

Unifying scan compression. - Swapnil Bahl; Shreyans Rungta; Shray Khullar; Rohit Kapur; Anshuman Chandra; Salvatore Talluto 001; Pramod Notiyath; Ajay Rajagopalan (DFT, 2014)