A compact single-pass architecture for hysteresis thresholding and component labeling. - Mayssaa Al Najjar; Swetha Karlapudi; Magdy A. Bayoumi (ICIP, 2010)

High-performance asic architecture for hysteresis thresholding and component feature extraction in limited-resource applications. - Mayssaa Al Najjar; Swetha Karlapudi; Magdy A. Bayoumi (ICIP, 2011)

Memory-Efficient Architecture for Hysteresis Thresholding and Object Feature Extraction. - Mayssaa Al Najjar; Swetha Karlapudi; Magdy A. Bayoumi (IEEE Trans. Image Process., 2011)

Highly stable, dual-port, sub-threshold 7T SRAM cell for ultra-low power application. - Abhijit Sil; Srikanth Bakkamanthala; Swetha Karlapudi; Magdy A. Bayoumi (NEWCAS, 2012)