FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memories. - Syed Azhar Ali Zaidi; Muhammad Awais 004; Carlo Condo; Maurizio Martina; Guido Masera (DASIP, 2013)

High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values. - Guoping Xiao; Waqar Ahmad; Syed Azhar Ali Zaidi; Massimo Ruo Roch; Giovanni Causapruno (ApplePies, 2014)

Molecular transistor circuits: From device model to circuit simulation. - Ali Zahir; Syed Azhar Ali Zaidi; Azzurra Pulimeno; Mariagrazia Graziano; Danilo Demarchi; Guido Masera; Gianluca Piccinini (NANOARCH, 2014)

Design of LDPC Decoder for Error Correction in Memory Devices. - Syed Azhar Ali Zaidi (2015)

FPGA Accelerator of Algebraic Quasi Cyclic LDPC Codes for nand Flash Memories. - Syed Azhar Ali Zaidi; Abuduwaili Tuoheti; Maurizio Martina; Guido Masera (IEEE Des. Test, 2016)

Resource Management in Multicloud IoT Radio Access Network. - Muhammad Awais 004; Ashfaq Ahmed; Syed Azhar Ali Zaidi; Muhammad Naeem 001; Waleed Ejaz; Alagan Anpalagan (IEEE Internet Things J., 2019)

A novel embedded system design for the detection and classification of cardiac disorders. - Umair Riaz; Sumair Aziz; Muhammad Umar Khan; Syed Azhar Ali Zaidi; Muhammad Ukasha; Aamir Rashid (Comput. Intell., 2021)

UETT4K Anti-UAV: A Large Scale 4K Benchmark Dataset for Vision-Based Drone Detection in High-Resolution Imagery. - Mughees Sarwar Awan; Syed Azhar Ali Zaidi; Junaid Mir (IEEE Access, 2025)