Design of a fault-tolerant coarse-grained. - Syed M. A. H. Jafri; Stanislaw J. Piestrak; Olivier Sentieys; Sébastien Pillement (ISQED, 2010)

Compact generic intermediate representation (CGIR) to enable late binding in coarse grained reconfigurable architectures. - Syed M. A. H. Jafri; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (FPT, 2011)

Compression Based Efficient and Agile Configuration Mechanism for Coarse Grained Reconfigurable Architectures. - Syed M. A. H. Jafri; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (IPDPS Workshops, 2011)

Self-adaptive Noc Power Management with Dual-level Agents - Architecture and Implementation. - Syed M. A. H. Jafri; Liang Guang; Axel Jantsch; Kolin Paul; Ahmed Hemani; Hannu Tenhunen (PECCS, 2012)

Private configuration environments (PCE) for efficient reconfiguration, in CGRAs. - Muhammad Adeel Tajammul; Syed M. A. H. Jafri; Ahmed Hemani; Juha Plosila; Hannu Tenhunen (ASAP, 2013)

Energy-Aware Fault-Tolerant CGRAs Addressing Application with Different Reliability Needs. - Syed M. A. H. Jafri; Stanislaw J. Piestrak; Kolin Paul; Ahmed Hemani; Juha Plosila; Hannu Tenhunen (DSD, 2013)

Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells. - Syed M. A. H. Jafri; Ozan Bag; Ahmed Hemani; Nasim Farahini; Kolin Paul; Juha Plosila; Hannu Tenhunen (ISQED, 2013)

Implementation and evaluation of configuration scrubbing on CGRAs: A case study. - Syed M. A. H. Jafri; Stanislaw J. Piestrak; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (ISSoC, 2013)

Hierarchical Supporting Structure for Dynamic Organization in Many-core Computing Systems. - Liang Guang; Syed M. A. H. Jafri; Bo Yang 009; Juha Plosila; Hannu Tenhunen (PECCS, 2013)

Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in CGRAs. - Syed M. A. H. Jafri; Muhammad Adeel Tajammul; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (ICSAMOS, 2013)

Energy-aware fault-tolerant network-on-chips for addressing multiple traffic classes. - Syed M. A. H. Jafri; Liang Guang; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (Microprocess. Microsystems, 2013)

Morphable Compression Architecture for Efficient Configuration in CGRAs. - Syed Mohammad Asad Hassan Jafri; Muhammad Adeel Tajammul; Masoud Daneshtalab; Ahmed Hemani; Kolin Paul; Peeter Ellervee; Juha Plosila; Hannu Tenhunen (DSD, 2014)

Customizable Compression Architecture for Efficient Configuration in CGRAs. - Syed M. A. H. Jafri; Muhammad Adeel Tajammul; Masoud Daneshtalab; Ahmed Hemani; Kolin Paul; Peeter Ellervee; Juha Plosila; Hannu Tenhunen (FCCM, 2014)

TransPar: Transformation based dynamic Parallelism for low power CGRAs. - Syed M. A. H. Jafri; Guilermo Serrano; Masoud Daneshtalab; Naeem Abbas; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (FPL, 2014)

NeuroCGRA: A CGRA with support for neural networks. - Syed M. A. H. Jafri; Tuan Nguyen Gia; Sergei Dytckov; Masoud Daneshtalab; Ahmed Hemani; Juha Plosila; Hannu Tenhunen (HPCS, 2014)

Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures. - Hassan Anwar; Syed M. A. H. Jafri; Sergei Dytckov; Masoud Daneshtalab; Masoumeh Ebrahimi; Ahmed Hemani; Juha Plosila; Giovanni Beltrame; Hannu Tenhunen (MES, 2014)

RuRot: Run-time rotatable-expandable partitions for efficient mapping in CGRAs. - Syed M. A. H. Jafri; Guilermo Serrano; Junaid Iqbal; Masoud Daneshtalab; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (ICSAMOS, 2014)

Private reliability environments for efficient fault-tolerance in CGRAs. - Syed M. A. H. Jafri; Stanislaw J. Piestrak; Ahmed Hemani; Kolin Paul; Juha Plosila; Hannu Tenhunen (Des. Autom. Embed. Syst., 2014)

Parallel distributed scalable runtime address generation scheme for a coarse grain reconfigurable computation and storage fabric. - Nasim Farahini; Ahmed Hemani; Hasan Sohofi; Syed M. A. H. Jafri; Muhammad Adeel Tajammul; Kolin Paul (Microprocess. Microsystems, 2014)

Design of the coarse-grained reconfigurable architecture DART with on-line error detection. - Syed M. A. H. Jafri; Stanislaw J. Piestrak; Olivier Sentieys; Sébastien Pillement (Microprocess. Microsystems, 2014)

FIST: A Framework to Interleave Spiking Neural Networks on CGRAs. - Tuan Ngyen; Syed M. A. H. Jafri; Masoud Daneshtalab; Ahmed Hemani; Sergei Dytckov; Juha Plosila; Hannu Tenhunen (PDP, 2015)

DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs. - Muhammad Adeel Tajammul; Syed M. A. H. Jafri; Peeter Ellervee; Ahmed Hemani; Hannu Tenhunen; Juha Plosila (VLSID, 2015)

Architecture and Implementation of Dynamic Parallelism, Voltage and Frequency Scaling (PVFS) on CGRAs. - Syed M. A. H. Jafri; Ozan Ozbag; Nasim Farahini; Kolin Paul; Ahmed Hemani; Juha Plosila; Hannu Tenhunen (ACM J. Emerg. Technol. Comput. Syst., 2015)

TEA: Timing and Energy Aware compression architecture for Efficient Configuration in CGRAs. - Syed M. A. H. Jafri; Masoud Daneshtalab; Ahmed Hemani; Naeem Abbas; Muhammad Ali Awan; Juha Plosila (Microprocess. Microsystems, 2015)

TransMem: A memory architecture to support dynamic remapping and parallelism in low power high performance CGRAs. - Muhammad Adeel Tajammul; Syed M. A. H. Jafri; Ahmed Hemani; Peeter Ellervee (PATMOS, 2016)

TransMap: Transformation Based Remapping and Parallelism for High Utilization and Energy Efficiency in CGRAs. - Syed M. A. H. Jafri; Masoud Daneshtalab; Naeem Abbas; Guillermo Serrano Leon; Ahmed Hemani (IEEE Trans. Computers, 2016)

Polymorphic Configuration Architecture for CGRAs. - Syed Mohammad Asad Hassan Jafri; Muhammad Adeel Tajammul; Ahmed Hemani; Kolin Paul; Juha Plosila; Peeter Ellervee; Hannu Tenhunen (IEEE Trans. Very Large Scale Integr. Syst., 2016)

SPEED: Open-Source Framework to Accelerate Speech Recognition on Embedded GPUs. - Syed Mohammad Asad Hassan Jafri; Ahmed Hemani; Leonardo Intesa (DSD, 2017)

MTP-Caffe: Memory, Timing, and Power aware tool for mapping CNNs to GPUs. - Yu Yang; Syed M. A. H. Jafri; Ahmed Hemani; Dimitrios Stathis 001 (PARMA-DITAM@HiPEAC, 2017)

MOCHA: Morphable Locality and Compression Aware Architecture for Convolutional Neural Networks. - Syed Mohammad Asad Hassan Jafri; Ahmed Hemani; Kolin Paul; Naeem Abbas (IPDPS, 2017)

SiLago-CoG: Coarse-Grained Grid-Based Design for Near Tape-Out Power Estimation Accuracy at High Level. - Syed Mohammad Asad Hassan Jafri; Nasim Farahini; Ahmed Hemani (ISVLSI, 2017)

Synchoricity and NOCs could make Billion Gate Custom Hardware Centric SOCs Affordable. - Ahmed Hemani; Syed Mohammad Asad Hassan Jafri; Shayesteh Masoumian (NOCS, 2017)

Can a reconfigurable architecture beat ASIC as a CNN accelerator? - Syed M. A. H. Jafri; Ahmed Hemani; Dimitrios Stathis 001 (SAMOS, 2017)

Regional Clock Tree Generation by Abutment in Synchoros VLSI Design. - Dimitrios Stathis 001; Panagiotis Chaourani; Syed M. A. H. Jafri; Ahmed Hemani (CoRR, 2019)

eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. - Dimitrios Stathis 001; Chirag Sudarshan; Yu Yang; Matthias Jung 001; Syed Mohammad Asad Hassan Jafri; Christian Weis; Ahmed Hemani; Anders Lansner; Norbert Wehn (CoRR, 2019)

Refresh Triggered Computation: Improving the Energy Efficiency of Convolutional Neural Network Accelerators. - Syed Mohammad Asad Hassan Jafri; Hasan Hassan; Ahmed Hemani; Onur Mutlu (ACM Trans. Archit. Code Optim., 2021)

Clock tree generation by abutment in synchoros VLSI design. - Dimitrios Stathis 001; Panagiotis Chaourani; Syed M. A. H. Jafri; Ahmed Hemani (Microprocess. Microsystems, 2023)