Effects of property ordering in an incremental formal modeling methodology. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla (HLDVT, 2004)

Extreme Formal Modeling (XFM) for Hardware Models. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla; David Berner (MTV, 2004)

A Formally Verified Application-Level Framework for Real-Time Scheduling on POSIX Real-Time Operating Systems. - Peng Li 020; Binoy Ravindran; Syed Suhaib; Shahrooz Feizabadi (IEEE Trans. Software Eng., 2004)

System Level Design Methodology for System On Chips using Multi-Threaded Graphs. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla (SoCC, 2005)

A Functional Programming Framework for Latency Insensitive Protocol Validation. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla; David Berner; Jean-Pierre Talpin (FMGALS@MEMOCODE, 2005)

XFM: An incremental methodology for developing formal models. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla; David Berner (ACM Trans. Design Autom. Electr. Syst., 2005)

Polychronous Methodology For System Design: A True Concurrency Approach. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla; Jean-Pierre Talpin (HLDVT, 2006)

A Trace Based Framework for Validation of SoC Designs with GALS Systems. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla (SoCC, 2006)

Validating Families of Latency Insensitive Protocols. - Syed Suhaib; Deepak Mathaikutty; David Berner; Sandeep K. Shukla (IEEE Trans. Computers, 2006)

Dataflow Architectures for GALS. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla (FMGALS@MEMOCODE, 2007)

Formal Methods for Intellectual Property Composition Across Synchronization Domains. - Syed Suhaib (2007)

Formal Transformation of a KPN Specification to a GALS Implementation. - Syed Suhaib; Bijoy Antony Jose; Sandeep K. Shukla; Deepak Mathaikutty (FDL, 2008)

A Trace-Based Framework for Verifiable GALS Composition of IPs. - Syed Suhaib; Deepak Mathaikutty; Sandeep K. Shukla (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Domain-Adapted LLMs for VLSI Design and Verification: A Case Study on Formal Verification. - Mingjie Liu; Minwoo Kang; Ghaith Bany Hamad; Syed Suhaib; Haoxing Ren (VTS, 2024)

FVEval: Understanding Language Model Capabilities in Formal Verification of Digital Hardware. - Minwoo Kang; Mingjie Liu; Ghaith Bany Hamad; Syed M. Suhaib; Haoxing Ren (DATE, 2025)

AssertionForge: Enhancing Formal Verification Assertion Generation with Structured Representation of Specifications and RTL. - Yunsheng Bai; Ghaith Bany Hamad; Syed Suhaib; Haoxing Ren (CoRR, 2025)