Power Consumption Reduction Explorations in Processors by Enhancing Performance Using Small ESL Reprogrammable eFPGAs. - Syed Zahid Ahmed; Julien Eydoux; Michael Fernández; Laurent Rouge; Gilles Sassatelli; Lionel Torres (ReConFig, 2008)

Exploration of power reduction and performance enhancement in LEON3 processor with ESL reprogrammable eFPGA in processor pipeline and as a co-processor. - Syed Zahid Ahmed; Julien Eydoux; Laurent Rouge; Jean-Baptiste Cuelle; Gilles Sassatelli; Lionel Torres (DATE, 2009)

MRAM Based eFPGAs: Programming and Silicon Flows, Exploration Environments, MRAM Current State in Industry and Its Unique Potentials for FPGAs. - Yoann Guillemenet; Syed Zahid Ahmed; Lionel Torres; Alexandre Martheley; Julien Eydoux; Jean-Baptiste Cuelle; Laurent Rouge; Gilles Sassatelli (ReConFig, 2009)

A Dynamic Reconfigurable MRAM based FPGA. - Lionel Torres; Yoann Guillemenet; Syed Zahid Ahmed (ERSA, 2010)

Survey of New Trends in Industry for Programmable Hardware: FPGAs, MPPAs, MPSoCs, Structured ASICs, eFPGAs and New Wave of Innovation in FPGAs. - Syed Zahid Ahmed; Gilles Sassatelli; Lionel Torres; Laurent Rouge (FPL, 2010)

Design and analysis of an FPGA based encoder SoC for locally stationary image source. - Yuhui Bai; Syed Zahid Ahmed; Bertrand Granado (DASIP, 2013)

FPGA implementation of Hierarchical Enumerative Coding for locally stationary image source. - Yuhui Bai; Syed Zahid Ahmed; Bertrand Granado (FPL, 2013)

FPGA vs DSP: A throughput and power efficiency comparison for Hierarchical Enumerative Coding. - Yuhui Bai; Syed Zahid Ahmed; Imen Mhedhbi; Khalil Hachicha; Cedric Champion; Patrick Garda; Bertrand Granado (VLSI-SoC, 2013)

Accelerating Heap-Based Priority Queue in Image Coding Application Using Parallel Index-Aware Tree Access. - Yuhui Bai; Syed Zahid Ahmed; Bertrand Granado (ARC, 2014)

Fast and Power Efficient Heapsort IP for Image Compression Application. - Yuhui Bai; Syed Zahid Ahmed; Bertrand Granado (FCCM, 2014)

A power-efficient adaptive heapsort for fpga-based image coding application (abstract only). - Yuhui Bai; Syed Zahid Ahmed; Bertrand Granado (FPGA, 2014)

Synchronizing physiological data and video in a telemedicine application: A multimedia approach. - Laurent Lambert; Khalil Hachicha; Syed Zahid Ahmed; Andréa Pinna 001; Patrick Garda (EMBC, 2015)

ARC 2014: Towards a Fast FPGA Implementation of a Heap-Based Priority Queue for Image Coding Using a Parallel Index-Aware Tree. - Yuhui Bai; Syed Zahid Ahmed; Bertrand Granado (ACM Trans. Reconfigurable Technol. Syst., 2015)

Medical images compression with clinical diagnostic quality using logarithmic DWT. - Mohammed Shaaban Ibraheem; Syed Zahid Ahmed; Khalil Hachicha; Sylvain Hochberg; Patrick Garda (BHI, 2016)

High frame rate medical quality video compression for tele-EEG. - Laurent Lambert; Syed Zahid Ahmed; Khalil Hachicha; Andréa Pinna 001; Patrick Garda (EMBC, 2016)

A Low DDR Bandwidth 100FPS 1080p Video 2D Discrete Wavelet Transform Implementation on FPGA (Abstract Only). - Mohammed Shaaban Ibraheem; Syed Zahid Ahmed; Khalil Hachicha; Sylvain Hochberg; Patrick Garda (FPGA, 2016)

Logarithmic Discrete Wavelet Transform for Medical Image Compression with Diagnostic Quality. - Mohammed Shaaban Ibraheem; Khalil Hachicha; Syed Zahid Ahmed; Sylvain Hochberg; Patrick Garda (EAI Endorsed Trans. Pervasive Health Technol., 2016)

High-throughput parallel DWT hardware architecture implemented on an FPGA-based platform. - Mohammed Shaaban Ibraheem; Khalil Hachicha; Syed Zahid Ahmed; Laurent Lambert; Patrick Garda (J. Real Time Image Process., 2019)