Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC). - Thierry Devoivre; M. Lunenborg; C. Julien; J.-P. Carrere; P. Ferreira; W. J. Toren; A. VandeGoor; P. Gayet; T. Berger; O. Hinsinger; P. Vannier; Y. Trouiller; et al. (MTDT, 2002)

A Practical Guide to Marker Based and Hybrid Visual Registration for AR Industrial Applications. - Steve Bourgeois; Hanna Martinsson; Quoc Cuong Pham; Sylvie Naudet (CAIP, 2005)

Design and performance parameters of an ultra-low voltage, single supply 32bit processor implemented in 28nm FDSOI technology. - Sylvain Clerc; Fady Abouzeid; Darayus Adil Patel; Jean-Marc Daveau; Cyril Bottoni; Lorenzo Ciampolini; Fabien Giner; David Meyer; Robin Wilson; Philippe Roche; Sylvie Naudet; Arnaud Virazel; et al. (ISQED, 2015)

Analysis of setup and hold margins inside silicon for advanced technology nodes. - Deepak-Kumar Arora; Darayus Adil Patel; Shahabuddin; Sanjay Kumar; Navin Kumar Dayani; Balwant Singh; Sylvie Naudet; Arnaud Virazel; Alberto Bosio (ISQED, 2016)

28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications. - Rossella Ranica; Nicolas Planes; Vincent Huard; Olivier Weber; Daniel Noblet; Damien Croain; Fabien Giner; Sylvie Naudet; P. Mergault; S. Ibars; A. Villaret; Maryline Parra; et al. (VLSI Circuits, 2016)

An Effective Power-Aware At-Speed Test Methodology for IP Qualification and Characterization. - Kapil Juneja; Darayus Adil Patel; Rajesh Kumar Immadi; Balwant Singh; Sylvie Naudet; Pankaj Agarwal; Arnaud Virazel; Patrick Girard 001 (J. Electron. Test., 2016)

Dynamic aging compensation and Safety measures in Automotive environment. - Souhir Mhira; Vincent Huard; Ahmed Benhassain; Florian Cacho; Sylvie Naudet; Abhishek Jain 003; C. R. Parthasarathy; Alain Bravaix (IOLTS, 2017)

Cognitive approach to support dynamic aging compensation. - Souhir Mhira; Vincent Huard; Ahmed Benhassain; Florian Cacho; David Meyer; Sylvie Naudet; Abhishek Jain 003; C. R. Parthasarathy; Alain Bravaix (ITC, 2017)