A self-synchronized RF-interconnect for 3-dimensional integrated circuits. - Qun Gu; Zhiwei Xu 003; Jenwei Ko; Szukang Hsien; M. Frank Chang (ISCAS (4), 2004)

A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization. - Wenbo Liu 003; Yuchun Chang; Szukang Hsien; Bo-Wei Chen; Yung-Pin Lee; Wen-Tsao Chen; Tzu-Yi Yang; Gin-Kou Ma; Yun Chiu (ISSCC, 2009)

SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration. - Pingli Huang; Szukang Hsien; Victor Lu; Peiyuan Wan; Seung-Chul Lee; Wenbo Liu 003; Bo-Wei Chen; Yung-Pin Lee; Wen-Tsao Chen; Tzu-Yi Yang; Gin-Kou Ma; Yun Chiu (CICC, 2010)

SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration. - Pingli Huang; Szukang Hsien; Victor Lu; Peiyuan Wan; Seung-Chul Lee; Wenbo Liu 003; Bo-Wei Chen; Yung-Pin Lee; Wen-Tsao Chen; Tzu-Yi Yang; Gin-Kou Ma; Yun Chiu (IEEE J. Solid State Circuits, 2011)