Cache-based pipeline architecture in the Hitachi H32/200 32-bit microprocessor. - Tadahiko Nishimukai; Hideo Inayoshi; Kikuko Takagi; Kazuhiko Iwasaki; Ikuya Kawasaki; M. Hanawa; Takeshi Okada (ICCD, 1988)

Realization of Gmicro/200. - Hideo Inayoshi; Ikuya Kawasaki; Tadahiko Nishimukai; Ken Sakamura (IEEE Micro, 1988)

Aliasing Probabilities and Weight Distributions of Several Codes. - Kazuhiko Iwasaki; Tadahiko Nishimukai (Syst. Comput. Jpn., 1989)

On-Chip Multiple Superscalar Processors with Secondary Cache Memories. - M. Hanawa; Tadahiko Nishimukai; O. Nishii; Masato Suzuki; Kazuo Yano; Mitsuru Hiraki; Shoji Shukuri; Takashi Nishida (ICCD, 1991)

Hitachi-PA/50, SH Series Microcontroller. - Tadahiko Nishimukai (DAC, 1994)