A 6-ns ECL 100 K I/O and 8-ns 3.3-V TTL I/O 4-Mb BiCMOS SRAM. - Kazuyuki Nakamura; Takashi Oguri; Takao Atsumo; Masahide Takada; Atsushi Ikemoto; Hisamitsu Suzuki; Tadashi Nishigori; Tohru Yamazaki (IEEE J. Solid State Circuits, 1992)