Parasitic Capacitance Analysis in Short Channel GaN MIS-HEMTs. - Roméo Kom Kammeugne; Charles Leroux; Tadeu Mota Frutuoso; Jacques Cluzel; Laura Vauche; Cyrille Le Royer; Romain Gwoziecki; Xavier Garros; Fred Gaillard; Matthew Charles; Edwige Bano; Gérard Ghibaudo (ESSDERC, 2021)

Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration. - Tadeu Mota Frutuoso; Jose Lugo-Alvarez; Xavier Garros; Laurent Brunet; Joris Lacord; Louis Gerrer; Mikaël Cassé; Edoardo Catapano; Claire Fenouillet-Béranger; François Andrieu; Fred Gaillard; Philippe Ferrari (IRPS, 2021)

Ultra-fast CV methods (< 10µs) for interface trap spectroscopy and BTI reliability characterization using MOS capacitors. - Tadeu Mota Frutuoso; Xavier Garros; Jose Lugo-Alvarez; Roméo Kom Kammeugne; L. D. M. Zouknak; Abygaël Viey; W. van den Daele; Philippe Ferrari; Fred Gaillard (IRPS, 2022)

Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration. - Tadeu Mota Frutuoso; Xavier Garros; Perrine Batude; Laurent Brunet; Joris Lacord; Benoit Sklénard; V. Lapras; Claire Fenouillet-Béranger; M. Ribotta; A. Magalhaes-Lucas; J. Kanyandekwe; R. Kies; et al. (VLSI Technology and Circuits, 2022)

Insight Into HCI Reliability on I/O Nitrided Devices. - C. Doyen; V. Yon; Xavier Garros; Luigi Basset; Tadeu Mota Frutuoso; C. Dagon; Cheikh Diouf; X. Federspiel; V. Millon; Frederic Monsieur; C. Pribat; David Roy 001 (IRPS, 2023)

Breakthrough Processes for Si CMOS Devices with BEOL Compatibility for 3D Sequential Integrated more than Moore Analog Applications. - Daphnée Bosch; Abygaël Viey; Tadeu Mota Frutuoso; P. Lheritier; C. Licitra; Nada Zerhouni; A. Albouy; Laurent Brunet; A. Magalhaes-Lucas; L. M. B. da Silva; H. Boutry; M. Husien Fahmy Taha Abdelrahman; et al. (VLSI Technology and Circuits, 2024)

First Radio-Frequency Circuits Fabricated in Top-Tier of a Full 3D Sequential Integration Process at mmW for 5G Applications. - J. Luge-Alvarez; J. B. David; Alexandre Siligaris; Vincent Puyal; G. Moritz; Tadeu Mota Frutuoso; V. Lapras; Claire Fenouillet-Béranger; Laurent Brunet; P. Vincent; Didier Lattard; Xavier Garros; et al. (VLSI Technology and Circuits, 2024)

Fast CV MSM Technique for Comprehensive Analysis of Bulk Trapping in Low-K Carbon-Doped Dielectrics. - Tadeu Mota Frutuoso; William Vandendaele; A. Bond; F. Bringuier; V. Lapras; Marie Claire Cyrille; Claire Fenouillet-Béranger; B. Duriez; Xavier Garros (IRPS, 2025)