Low-cost and Universal Secure Scan: a Design- Architecture for Crypto Chips. - Marcin Gomulkiewicz; Maciej Nikodem; Tadeusz Tomczak (DepCoS-RELCOMEX, 2006)

Residue Arithmetic in FPGA Matrices. - Tadeusz Tomczak (DepCoS-RELCOMEX, 2006)

Fast Sign Detection for RNS (2n-1, 2n, 2n+1). - Tadeusz Tomczak (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Hierarchical residue number systems with small moduli and simple converters. - Tadeusz Tomczak (Int. J. Appl. Math. Comput. Sci., 2011)

Complete PISO and SIMPLE solvers on Graphics Processing Units - Tadeusz Tomczak; Katarzyna Zadarnowska; Zbigniew Koza; Maciej Matyka; Lukasz Miroslaw (CoRR, 2012)

Memory layout in GPU implementation of lattice Boltzmann method for sparse 3D geometries. - Tadeusz Tomczak; Roman G. Szafran (CoRR, 2016)

Sparse Geometries Handling in Lattice Boltzmann Method Implementation for Graphic Processors. - Tadeusz Tomczak; Roman G. Szafran (IEEE Trans. Parallel Distributed Syst., 2018)

A new GPU implementation for lattice-Boltzmann simulations on sparse geometries. - Tadeusz Tomczak; Roman G. Szafran (Comput. Phys. Commun., 2019)

Data-Oriented Language Implementation of Lattice-Boltzmann Method for Dense and Sparse Geometries. - Tadeusz Tomczak (CoRR, 2021)

Double-precision hardware accelerator for incompressible Navier-Stokes equations solver based on discontinuous Galerkin method. - Tadeusz Tomczak; Mariusz Ksiezyk; Jacek Hanke; Marek Kostur; Maciej Marek (Adv. Eng. Softw., 2023)