A high stability DC-DC Boost Converter with Ripple Current Control and capacitor-free LDOs for AMOLED display. - Se-Won Wang; Young-Jin Woo; Sung-Ho Bae; Tae-Hwang Kong; Gyu-Ha Cho; Gyu-Hyeong Cho (A-SSCC, 2011)

Zero-order control of boost DC-DC converter with transient enhancement using residual current. - Tae-Hwang Kong; Young-Jin Woo; Se-Won Wang; Sung-Wan Hong; Gyu-Hyeong Cho (ISSCC, 2011)

A 0.791mm2 fully on-chip controller with self-error-correction for boost DC-DC converter based on Zero-Order Control. - Tae-Hwang Kong; Sung-Wan Hong; Sungwoo Lee; Jong-Pil Im; Gyu-Hyeong Cho (CICC, 2012)

A 40mV transformer-reuse self-startup boost converter with MPPT control for thermoelectric energy harvesting. - Jong-Pil Im; Se-Won Wang; Kang-Ho Lee; Young-Jin Woo; Young-sub Yuk; Tae-Hwang Kong; Sung-Wan Hong; Seung-Tak Ryu; Gyu-Hyeong Cho (ISSCC, 2012)

High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC). - Sung-Wan Hong; Tae-Hwang Kong; Seungchul Jung; Sungwoo Lee; Se-Won Wang; Jong-Pil Im; Gyu-Hyeong Cho (VLSIC, 2012)

High Area-Efficient DC-DC Converter With High Reliability Using Time-Mode Miller Compensation (TMMC). - Sung-Wan Hong; Tae-Hwang Kong; Sang-Hui Park; Changbyung Park; Seungchul Jung; Sungwoo Lee; Gyu-Hyeong Cho (IEEE J. Solid State Circuits, 2013)

Zeroth-Order Control of Boost DC-DC Converter With Transient Enhancement Scheme. - Tae-Hwang Kong; Young-Jin Woo; Se-Won Wang; Yong-Joon Jeon; Sung-Wan Hong; Gyu-Hyeong Cho (IEEE J. Solid State Circuits, 2013)

An 83% peak efficiency and 1.07W/mm2 power density Single Inductor 4-Output DC-DC converter with Bang-Bang Zeroth-Order Control. - Dong-Chul Park; Tae-Hwang Kong; Sukhwan Choi; Gyu-Hyeong Cho (A-SSCC, 2014)

Low drain voltage S/H type PWM LED current driver for BLU in mobile LCD. - Changbyung Park; Tae-Hwang Kong; Gyu-Hyeong Cho (CICC, 2014)

23.5 An energy pile-up resonance circuit extracting maximum 422% energy from piezoelectric material in a dual-source energy-harvesting interface. - Young-Sub Yuk; Seungchul Jung; Hui-Dong Gwon; Sukhwan Choi; Si-Duk Sung; Tae-Hwang Kong; Sung-Wan Hong; Jun-Han Choi; Min-Yong Jeong; Jong-Pil Im; Seung-Tak Ryu; Gyu-Hyeong Cho (ISSCC, 2014)

A 0.791 mm2 On-Chip Self-Aligned Comparator Controller for Boost DC-DC Converter Using Switching Noise Robust Charge-Pump. - Tae-Hwang Kong; Sung-Wan Hong; Gyu-Hyeong Cho (IEEE J. Solid State Circuits, 2014)

Inverting Buck-Boost DC-DC Converter for Mobile AMOLED Display Using Real-Time Self-Tuned Minimum Power-Loss Tracking (MPLT) Scheme With Lossless Soft-Switching for Discontinuous Conduction Mode. - Sung-Wan Hong; Sang-Hui Park; Tae-Hwang Kong; Gyu-Hyeong Cho (IEEE J. Solid State Circuits, 2015)

8.3 A 200mA digital low-drop-out regulator with coarse-fine dual loop in mobile application processors. - Yong-Jin Lee; Min-Yong Jung; Shashank Singh 006; Tae-Hwang Kong; Dae-Yong Kim; Kwang-Ho Kim; Sang-Ho Kim; Jae-Jin Park; Ho-Jin Park; Gyu-Hyeong Cho (ISSCC, 2016)

11.8 A 96.8%-Efficiency Continuous Input/Output-Current Step-Up/Down Converter Powering Disposable IoTs with Reconfigurable Multi-Cell-Balanced Alkaline Batteries. - Min-Woo Ko; Gyeong-Gu Kang; Ki-Duk Kim; Ji-Hun Lee; Seok-Tae Koh; Tae-Hwang Kong; Sang-Ho Kim; Sungyong Lee; Michael Choi; Jongshin Shin; Gyu-Hyeong Cho; Hyunsik Kim (ISSCC, 2020)

29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET CMOS. - Dong-Hoon Jung; Tae-Hwang Kong; Jun-Hyeok Yang; SangHo Kim; Kwangho Kim; Jeongpyo Park; Michael Choi; Jongshin Shin (ISSCC, 2021)

A Hybrid Always-Dual-Path Recursive Step-Down Converter Using Adaptive Switching Level Control Achieving 95.4% Efficiency with 288mΩ Large-DCR Inductor. - Woojoong Jung; Minsu Kim; Hyunjun Park; Sungmin Yoo; Tae-Hwang Kong; Jun-Hyeok Yang; Michael Choi; Jongshin Shin; Hyung-Min Lee (CICC, 2022)

A Fully-Integrated 0.9W/mm2 79.1%-Efficiency 200MHz Multi-Phase Buck Converter with Flying-Capacitor-Based Inter-Inductor Current Balancing Technique. - Jeong-Hyun Cho; Hong-Hyun Bae; Gyu-Wan Lim; Tae-Hwang Kong; Jun-Hyeok Yang; Hyun-Sik Kim (VLSI Technology and Circuits, 2022)

A 0.5-1 V, -68 dB Power Supply Rejection Capacitorless Analog LDO Using Voltage-to-Time Conversion in 28-nm CMOS. - Jun-Hwan Jang; Hui-Dong Gwon; Tae-Hwang Kong; Jun-Hyeok Yang; Byong-Deok Choi (IEEE J. Solid State Circuits, 2022)

A Fully Integrated Multi-Phase Voltage Regulator With Flying-Capacitor-Based Inter-Inductor Current Self-Balancing Scheme and Charge-Recycling Gate Driver. - Jeong-Hyun Cho; Hong-Hyun Bae; Gyu-Wan Lim; Tae-Hwang Kong; Jun-Hyeok Yang; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2024)