Insertion of Ag Layer in TiN/SiNx/TiN RRAM and Its Effect on Filament Formation Modeled by Monte Carlo Simulation. - Yeon-Joon Choi; Min-Hwi Kim; Suhyun Bang; Tae-Hyeon Kim 004; Dong Keun Lee; Kyungho Hong; Chae Soo Kim; Sungjun Kim; Seongjae Cho; Byung-Gook Park (IEEE Access, 2020)

Zinc Tin Oxide Synaptic Device for Neuromorphic Engineering. - Ji-Ho Ryu; Boram Kim; Fayyaz Hussain; Muhammad Ismail; Chandreswar Mahata; Teresa Oh; Muhammad Imran; Kyung Kyu Min; Tae-Hyeon Kim 004; Byung-Do Yang; Seongjae Cho; Byung-Gook Park; et al. (IEEE Access, 2020)

Selected Bit-Line Current PUF: Implementation of Hardware Security Primitive Based on a Memristor Crossbar Array. - Dayoung Kim; Tae-Hyeon Kim 004; Yun-Yeong Choi; Geun Ho Lee 004; Jungwon Lee; Wookyung Sun; Byung-Gook Park; Hyungjin Kim 001; Hyungsoon Shin (IEEE Access, 2021)

4-bit Multilevel Operation in Overshoot Suppressed Al2O3/TiOx Resistive Random-Access Memory Crossbar Array. - Sungjoon Kim; Jinwoo Park; Tae-Hyeon Kim 004; Kyungho Hong; Yeongjin Hwang; Byung-Gook Park; Hyungjin Kim 001 (Adv. Intell. Syst., 2022)

Memristor Crossbar Circuit for Ternary Content-Addressable Memory with Fine-Tuning Operation. - Sangwook Youn; Sungjoon Kim; Tae-Hyeon Kim 004; Jinwoo Park; Hyungjin Kim 001 (Adv. Intell. Syst., 2023)

Optimization of Random Telegraph Noise Characteristics in Memristor for True Random Number Generator. - Min Suk Song; Tae-Hyeon Kim 004; Hwiho Hwang; Suhyeon Ahn; Hussein Nili; Hyungjin Kim 001 (Adv. Intell. Syst., 2023)

Engineering nvCap From FEOL to BEOL with Ferroelectric Small-signal Non-destructive Read. - Tae-Hyeon Kim 004; Yuan-Chun Luo; Omkar Phadke; James Read; Shimeng Yu (IMW, 2024)

Threshold learning algorithm for memristive neural network with binary switching behavior. - Sangwook Youn; Yeongjin Hwang; Tae-Hyeon Kim 004; Sungjoon Kim; Hwiho Hwang; Jinwoo Park; Hyungjin Kim 001 (Neural Networks, 2024)

Semiconductor Memory Technologies: State-of-the-Art and Future Trends. - Shimeng Yu; Tae-Hyeon Kim 004 (Computer, 2024)

Capacitive Synaptor with Gate Surrounding Semiconductor Pillar Structure and Overturned Charge Injection for Compute-in-Memory. - Choong-Ki Kim; James Read; Minji Shon; Tae-Hyeon Kim 004; Myung-Su Kim; Ji-Man Yu; Min-Soo Yoo; Yang-Kyu Choi; Shimeng Yu (Adv. Intell. Syst., 2025)

Exploiting Hardware Nonidealities for Robust Low-Precision Ensembles on ACIM. - Donghyuck Lee; Tae-Hyeon Kim 004 (IEEE Trans. Very Large Scale Integr. Syst., 2026)