A Time-Based Bandpass ADC Using Time-Interleaved Voltage-Controlled Oscillators. - Young-Gyu Yoon; Jaewook Kim; Tae-Kwang Jang; SeongHwan Cho (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Analysis and Design of Voltage-Controlled Oscillator Based Analog-to-Digital Converter. - Jaewook Kim; Tae-Kwang Jang; Young-Gyu Yoon; SeongHwan Cho (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A 0.8V, sub-mW, varactor-tuning ring-oscillator-based clock generator in 32nm CMOS. - Jenlung Liu; Sehyung Jeon; Tae-Kwang Jang; Dohyung Kim; Jihyun F. Kim; Jaejin Park; Hojin Park (A-SSCC, 2011)

A 0.004mm2 250μW ΔΣ TDC with time-difference accumulator and a 0.012mm2 2.5mW bang-bang digital PLL using PRNG for low-power SoC applications. - Jong-Phil Hong; Sung-Jin Kim; Jenlung Liu; Nan Xing; Tae-Kwang Jang; Jaejin Park; Jihyun F. Kim; Taeik Kim; Hojin Park (ISSCC, 2012)

A Highly-Digital VCO-Based Analog-to-Digital Converter Using Phase Interpolator and Digital Calibration. - Tae-Kwang Jang; Jaewook Kim; Young-Gyu Yoon; SeongHwan Cho (IEEE Trans. Very Large Scale Integr. Syst., 2012)

A 0.026mm2 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter. - Tae-Kwang Jang; Nan Xing; Frank Liu 003; Jungeun Shin; Hyungreal Ryu; Jihyun F. Kim; Taeik Kim; Jaejin Park; Hojin Park (ISSCC, 2013)

A 23pW, 780ppm/°C resistor-less current reference using subthreshold MOSFETs. - Myungjoon Choi; Inhee Lee 001; Tae-Kwang Jang; David T. Blaauw; Dennis Sylvester (ESSCIRC, 2014)

15.2 A 0.012mm2 3.1mW bang-bang digital fractional-N PLL with a power-supply-noise cancellation technique and a walking-one-phase-selection fractional frequency divider. - Jenlung Liu; Tae-Kwang Jang; Yonghee Lee; Jungeun Shin; Seunghoon Lee; Taeik Kim; Jaejin Park; Hojin Park (ISSCC, 2014)

FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node. - Tae-Kwang Jang; Seokhyeon Jeong; Myungjoon Choi; Wanyeong Jung; Gyouho Kim; Yen-Po Chen; Yejoong Kim; Wootaek Lim; Dennis Sylvester; David T. Blaauw (ESSCIRC, 2015)

A 99nW 70.4kHz resistive frequency locking on-chip oscillator with 27.4ppm/ºC temperature stability. - Myungjoon Choi; Suyoung Bang; Tae-Kwang Jang; David T. Blaauw; Dennis Sylvester (VLSIC, 2015)

21.5 A current-mode wireless power receiver with optimal resonant cycle tracking for implantable systems. - Myungjoon Choi; Tae-Kwang Jang; Junwon Jeong; Seokhyeon Jeong; David T. Blaauw; Dennis Sylvester (ISSCC, 2016)

5.8 A 4.7nW 13.8ppm/°C self-biased wakeup timer using a switched-resistor scheme. - Tae-Kwang Jang; Myungjoon Choi; Seokhyeon Jeong; Suyoung Bang; Dennis Sylvester; David T. Blaauw (ISSCC, 2016)

Millimeter-scale computing platform for next generation of Internet of Things. - Tae-Kwang Jang; Myungjoon Choi; Yao Shi 001; Inhee Lee 001; Dennis Sylvester; David T. Blaauw (IEEE RFID, 2016)

A 380pW dual mode optical wake-up receiver with ambient noise cancellation. - Wootaek Lim; Tae-Kwang Jang; Inhee Lee 001; Hun-Seok Kim; Dennis Sylvester; David T. Blaauw (VLSI Circuits, 2016)

A 110 nW Resistive Frequency Locked On-Chip Oscillator with 34.3 ppm/°C Temperature Stability for System-on-Chip Designs. - Myungjoon Choi; Tae-Kwang Jang; Suyoung Bang; Yao Shi 001; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2016)

A Resonant Current-Mode Wireless Power Receiver and Battery Charger With -32 dBm Sensitivity for Implantable Systems. - Myungjoon Choi; Tae-Kwang Jang; Junwon Jeong; Seokhyeon Jeong; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2016)

A 5.58 nW Crystal Oscillator Using Pulsed Driver for Real-Time Clocks. - Dongmin Yoon; Tae-Kwang Jang; Dennis Sylvester; David T. Blaauw (IEEE J. Solid State Circuits, 2016)

8.4 A 2.5ps 0.8-to-3.2GHz bang-bang phase- and frequency-detector-based all-digital PLL with noise self-adjustment. - Tae-Kwang Jang; Seokhyeon Jeong; Dongsuk Jeon; Kyojin David Choo; Dennis Sylvester; David T. Blaauw (ISSCC, 2017)

21.6 A 12nW always-on acoustic sensing and object recognition microsystem using frequency-domain feature extraction and SVM classification. - Seokhyeon Jeong; Yu Chen 070; Tae-Kwang Jang; Julius Ming-Lin Tsai; David T. Blaauw; Hun-Seok Kim; Dennis Sylvester (ISSCC, 2017)

Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I - Analog Circuit Techniques. - Taekwang Jang; Gyouho Kim; Benjamin P. Kempke; Michael B. Henry; Nikolaos Chiotellis; Carl Pfeiffer; Dongkwun Kim; Yejoong Kim; Zhiyoong Foo; Hyeongseok Kim; Anthony Grbic; Dennis Sylvester; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II - Data Communication, Energy Harvesting, Power Management, and Digital Circuits. - Tae-Kwang Jang; Gyouho Kim; Benjamin P. Kempke; Michael B. Henry; Nikolaos Chiotellis; Carl Pfeiffer; Dongkwun Kim; Yejoong Kim; Zhiyoong Foo; Hyeongseok Kim; Anthony Grbic; Dennis Sylvester; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A receiver/antenna co-design for a 1.5mJ per fix fully-integrated 10×10×6mm3 GPS logger. - Hyeongseok Kim; Nikolaos Chiotellis; Elnaz Ansari; Muhammad Faisal; Tae-Kwang Jang; Anthony Grbic; Hun-Seok Kim; David T. Blaauw; David D. Wentzloff (CICC, 2018)

A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification. - Tae-Kwang Jang; Jongyup Lim; Kyojin David Choo; Samuel Nason; Jeongsup Lee; Jeongsup Oh; Seokhyeon Jeong; Cynthia A. Chestek; Dennis Sylvester; David T. Blaauw (VLSI Circuits, 2018)

A 224 PW 260 PPM/°C Gate-Leakage-Based Timer for Ultra-Low Power Sensor Nodes with Second-Order Temperature Dependency Cancellation. - Jongyup Lim; Tae-Kwang Jang; Mehdi Saligane; Makoto Yasuda; Satoru Miyoshi; Masaru Kawaminami; David T. Blaauw; Dennis Sylvester (VLSI Circuits, 2018)

A Noise Reconfigurable All-Digital Phase-Locked Loop Using a Switched Capacitor-Based Frequency-Locked Loop and a Noise Detector. - Tae-Kwang Jang; Seokhyeon Jeong; Dongsuk Jeon; Kyojin David Choo; Dennis Sylvester; David T. Blaauw (IEEE J. Solid State Circuits, 2018)

Always-On 12-nW Acoustic Sensing and Object Recognition Microsystem for Unattended Ground Sensor Nodes. - Seokhyeon Jeong; Yu Chen 070; Tae-Kwang Jang; Julius Ming-Lin Tsai; David T. Blaauw; Hun-Seok Kim; Dennis Sylvester (IEEE J. Solid State Circuits, 2018)

An Adiabatic Sense and Set Rectifier for Improved Maximum-Power-Point Tracking in Piezoelectric Harvesting with 541% Energy Extraction Gain. - Yimai Peng; Kyojin David Choo; Sechang Oh 001; Inhee Lee 001; Tae-Kwang Jang; Yejoong Kim; Jongyup Lim; David T. Blaauw; Dennis Sylvester (ISSCC, 2019)

A 1.74.12 mm3 Fully Integrated pH Sensor for Implantable Applications using Differential Sensing and Drift-Compensation. - Taewook Kang; Inhee Lee 001; Sechang Oh 001; Tae-Kwang Jang; Yejoong Kim; Hyochan Ahn; Gyouho Kim; Se-Un Shin; Seokhyeon Jeong; Dennis Sylvester; David T. Blaauw (VLSI Circuits, 2019)

A Reference Oversampling Digital Phase-Locked Loop with -240 dB FOM and -80 dBc Reference Spur. - Ji-Hwan Seol; Dennis Sylvester; David T. Blaauw; Tae-Kwang Jang (VLSI Circuits, 2019)

An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Sense-and-Set Rectifier. - Yimai Peng; Kyojin David Choo; Sechang Oh 001; Inhee Lee 001; Tae-Kwang Jang; Yejoong Kim; Jongyup Lim; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2019)

3.3 A 0.51nW 32kHz Crystal Oscillator Achieving 2ppb Allan Deviation Floor Using High-Energy-to-Noise-Ratio Pulse Injection. - Li Xu 006; Tae-Kwang Jang; Jongyup Lim; Kyojin David Choo; David T. Blaauw; Dennis Sylvester (ISSCC, 2020)

26.9 A 0.19×0.17mm2 Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data Telemetry. - Jongyup Lim; Eunseong Moon; Michael Barrow; Samuel R. Nason; Paras R. Patel; Parag G. Patil; Sechang Oh 001; Inhee Lee 001; Hun-Seok Kim; Dennis Sylvester; David T. Blaauw; Cynthia A. Chestek; et al. (ISSCC, 2020)

An Energy-Efficient Low-Noise Complementary Parametric Amplifier Achieving 0.89 NEF. - Gabriele Atzeni; Jérémy Guichemerre; Alessandro Novello; Taekwang Jang (MWSCAS, 2020)

A 8.7ppm/°C, 694nW, One-Point Calibrated RC Oscillator using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM-Controlled Frequency-Locked Loops. - Giorgio Cristiano; Jiawei Liao; Alessandro Novello; Gabriele Atzeni; Taekwang Jang (VLSI Circuits, 2020)

An Offset Charge Compensating Biphasic Neuro - stimulation for Faradaic DC-Current Reduction. - Donghyeok Cho; Nahmil Koo; Taekwang Jang; SeongHwan Cho (ISCAS, 2021)

17.3 A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators. - Alessandro Novello; Gabriele Atzeni; Giorgio Cristiano; Mathieu Coustans; Taekwang Jang (ISSCC, 2021)

A Light Tolerant Neural Recording IC for Near-Infrared-Powered Free Floating Motes. - Jongyup Lim; Jungho Lee; Eunseong Moon; Michael Barrow; Gabriele Atzeni; Joseph G. Letner; Joseph T. Costello; Samuel R. Nason; Paras R. Patel; Parag G. Patil; Hun-Seok Kim; Cynthia A. Chestek; et al. (VLSI Circuits, 2021)

A 2.3GHz Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators achieving 78.1% Efficiency in 22nm FDSOI CMOS. - Alessandro Novello; Gabriele Atzeni; Giorgio Cristiano; Mathieu Coustans; Taekwang Jang (VLSI Circuits, 2021)

A 1.25-GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators. - Alessandro Novello; Gabriele Atzeni; Jonas Künzli; Giorgio Cristiano; Mathieu Coustans; Taekwang Jang (IEEE J. Solid State Circuits, 2021)

Reference Oversampling PLL Achieving -256-dB FoM and -78-dBc Reference Spur. - Ji-Hwan Seol; Kyojin Choo; David T. Blaauw; Dennis Sylvester; Taekwang Jang (IEEE J. Solid State Circuits, 2021)

Guest Editorial: IEEE TC Special Issue On Smart Edge Computing and IoT. - Luca Benini; Simone Benatti; Taekwang Jang; Abbas Rahimi (IEEE Trans. Computers, 2021)

A 0.5GHz 0.35mW LDO-Powered Constant-Slope Phase Interpolator With 0.22% INL. - Ahmed Elnaqib; Hayate Okuhara; Taekwang Jang; Davide Rossi; Luca Benini (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

An Energy-Efficient Spiking Neural Network for Finger Velocity Decoding for Implantable Brain-Machine Interface. - Jiawei Liao; Lars Widmer; Xiaying Wang; Alfio Di Mauro; Samuel R. Nason-Tomaszewski; Cynthia A. Chestek; Luca Benini; Taekwang Jang (AICAS, 2022)

A Second-Order Temperature-Compensated On-Chip R-RC Oscillator Achieving 7.93ppm/°C and 3.3pJ/Hz in -40°C to 125°C Temperature Range. - Youngwoo Ji; Jiawei Liao; Sina Arjmandpour; Alessandro Novello; Jae-Yoon Sim; Taekwang Jang (ISSCC, 2022)

An Impedance-boosted Switched-capacitor Low-noise Amplifier Achieving 0.4 NEF. - Gabriele Atzeni; Rosario M. Incandela; Youngwoo Ji; Alessandro Novello; Hesam Ghiasi; Giorgio Cristiano; Jiawei Liao; Qiuting Huang; Taekwang Jang (VLSI Technology and Circuits, 2022)

A 260×274 μm2 572 nW Neural Recording Micromote Using Near-Infrared Power Transfer and an RF Data Uplink. - Gabriele Atzeni; Jongyup Lim; Jiawei Liao; Alessandro Novello; Jungho Lee; Eunseong Moon; Michael Barrow; Joseph G. Letner; Joseph T. Costello; Samuel R. Nason; Paras R. Patel; Parag G. Patil; et al. (VLSI Technology and Circuits, 2022)

A 0.0014 mm2, 1.18 TΩ Segmented Duty-Cycled Resistor Replacing Pseudo-Resistor for Neural Recording Interface Circuits. - Can Livanelioglu; Woojun Choi; Donghwan Kim; Jiawei Liao; Rosario M. Incandela; Giorgio Cristiano; Taekwang Jang (VLSI Technology and Circuits, 2022)

A Light-Tolerant Wireless Neural Recording IC for Motor Prediction With Near-Infrared-Based Power and Data Telemetry. - Jongyup Lim; Jungho Lee; Eunseong Moon; Michael Barrow; Gabriele Atzeni; Joseph G. Letner; Joseph T. Costello; Samuel R. Nason; Paras R. Patel; Yi Sun; Parag G. Patil; Hun-Seok Kim; et al. (IEEE J. Solid State Circuits, 2022)

A 510-pW 32-kHz Crystal Oscillator With High Energy-to-Noise-Ratio Pulse Injection. - Li Xu 006; Taekwang Jang; Jongyup Lim; Kyojin David Choo; David T. Blaauw; Dennis Sylvester (IEEE J. Solid State Circuits, 2022)

A 1.01 NEF Low-Noise Amplifier Using Complementary Parametric Amplification. - Gabriele Atzeni; Jérémy Guichemerre; Alessandro Novello; Taekwang Jang (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor. - Yongjo Kim; Taekwang Jang; SeongHwan Cho (A-SSCC, 2023)

A High-Order-Temperature-Compensated 328kHz On Chip RC Timer Using Time-Interleaved Resistors Achieving 1.5pJ/Cycle and 5.86ppm°C. - Jiawei Liao; Hesam Ghiasi; Giorgio Cristiano; Taekwang Jang (CICC, 2023)

An 8b 1.0-to-1.25GS/s 0.7-to-0.8V Single-Stage Time-Based Gated-Ring-Oscillator ADC with $2 times$ Interpolating Sense-Amplifier-Latches. - Serdar A. Yonar; Pier Andrea Francese; Matthias Brändli; Marcel A. Kossel; Mridula Prathapan; Thomas Morf; Andrea Ruffino; Taekwang Jang (ISSCC, 2023)

An Energy-Efficient Impedance-Boosted Discrete-Time Amplifier Achieving 0.34 Noise Efficiency Factor and 389 MΩ Input Impedance. - Gabriele Atzeni; Can Livanelioglu; Lavinia Recchioni; Sina Arjmandpour; Taekwang Jang (VLSI Technology and Circuits, 2023)

A 1, 024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing. - Woojun Choi; Yiyang Chen; Donghwan Kim; Sean Weaver; Tilman Schlotter; Can Livanelioglu; Jiawei Liao; Rosario M. Incandela; Parham Davami; Gabriele Atzeni; Sina Arjmandpour; SeongHwan Cho; et al. (VLSI Technology and Circuits, 2023)

A Wireless Neural Stimulator IC for Cortical Visual Prosthesis. - Jungho Lee; Joseph G. Letner; Jongyup Lim; Yi Sun; Seokhyeon Jeong; Yejoong Kim; Beomseo Koo; Gabriele Atzeni; Jiawei Liao; Julianna M. Richie; Elena Della Valle; Paras R. Patel; et al. (VLSI Technology and Circuits, 2023)

A 4.1W/mm² Peak Power Density and 77% Peak Efficiency Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators and a Resonant LC Flying Impedance in 22nm FDSOI CMOS. - Alessandro Novello; Gabriele Atzeni; Tim Keller; Taekwang Jang (VLSI Technology and Circuits, 2023)

A 21.4 pW Subthreshold Voltage Reference with 0.020 %/V Line Sensitivity Using DIBL Compensation. - Louis Colbach; Taekwang Jang; Youngwoo Ji (Sensors, 2023)

A Fully Integrated 4: 1 DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators Achieving 74.5% Peak Efficiency and 0.78W/mm² Peak Power Density. - Donghyeok Cho; Taekwang Jang; SeongHwan Cho (A-SSCC, 2024)

Challenges and Innovations in Fully Integrated DC-DC Converters for IoT and Modern Computing Platforms. - Suyang Song; Alessandro Novello; Taekwang Jang (CICC, 2024)

Single Slope ADC with Reset Counting for FeFET-based In-Memory Computing. - Nellie Laleni; Sahana Padma; Thomas Kämpfe; Taekwang Jang (ISCAS, 2024)

A 0.29pJ/Step Fully Discrete-Time Charge Domain Bridge-to-Digital Converter for Force Sensing in Spinal Implants Using RC Bridge. - Tim Keller; Rosario M. Incandela; Xi Chen; Hesam Ghiasi; Mohsen Khodaee; Sina Arjmandpour; Jiawei Liao; H. Long; Tobias Götschi; Jonas Widmer; Taekwang Jang (VLSI Technology and Circuits, 2024)

A 65nm 36nJ/Decision Bio-inspired Temporal-Sparsity-Aware Digital Keyword Spotting IC with 0.6V Near-Threshold SRAM. - Qinyu Chen; Kwantae Kim; Chang Gao 002; Sheng Zhou; Taekwang Jang; Tobi Delbruck; Shih-Chii Liu (CoRR, 2024)

Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design. - Riccardo Vignali; Riccardo Zurla; Marco Pasotti; Pier Luigi Rolandi; Abhairaj Singh; Manuel Le Gallo; Abu Sebastian; Taekwang Jang; Alessio Antolini; Eleonora Franchi Scarselli; Alessandro Cabrini (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

An Impedance-Boosted Transformer-First Discrete-Time Analog Front-End Achieving 0.34 NEF and 389-MΩ Input Impedance. - Gabriele Atzeni; Can Livanelioglu; Sina Arjmandpour; Taekwang Jang (IEEE J. Solid State Circuits, 2024)

A Sub-mm3 Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry. - Jungho Lee; Joseph G. Letner; Jongyup Lim; Gabriele Atzeni; Jiawei Liao; Abhilasha Kamboj; Bhavika Mani; Seokhyeon Jeong; Yejoong Kim; Yi Sun; Beomseo Koo; Julianna M. Richie; et al. (IEEE J. Solid State Circuits, 2024)

A Jitter Programmable Digital Bang-Bang PLL Using PVT-Invariant Stochastic Jitter Monitor. - Yongjo Kim; Taekwang Jang; SeongHwan Cho (IEEE J. Solid State Circuits, 2024)

Energy-Efficient Sensor Interface Circuits for Biomedical Applications. - Hesam Omdeh Ghiasi; Taekwang Jang (ICICDT, 2025)

A 3.47 NEF 175.2dB FOMs Direct Digitization Front-End Featuring Delta Amplification for Enhanced Dynamic Range and Energy Efficiency in Bio-Signal Acquisition. - Kyeongwon Jeong; Can Livanelioglu; Jiawei Liao; Inhee Lee 001; Taekwang Jang (ISSCC, 2025)

37.8 A 13.5µW 35-Keyword End-to-End Keyword Spotting System Featuring Personalized On-Chip Training in 28nm CMOS. - Hyuk-Jin Lee; Kyunghoon Pyo; Taekwang Jang; Mingoo Seok; SeongHwan Cho (ISSCC, 2025)

19.10 A 4.6GHz 63.3fsrms PLL-XO Co-Design Using a Self-Aligned Pulse-Injection Driver Achieving -255.2dB FoMJ Including the XO Power and Noise. - Can Livanelioglu; Long He; Jiang Gong; Sina Arjmandpour; Gabriele Atzeni; Taekwang Jang (ISSCC, 2025)