12.2 A 7nm FinFET SRAM macro using EUV lithography for peripheral repair analysis. - Taejoong Song; Hoonki Kim; Woojin Rim; Yongho Kim; Sunghyun Park 003; Changnam Park; Minsun Hong; Giyong Yang; Jeongho Do; Jinyoung Lim; Seungyoung Lee; Ingyum Kim; et al. (ISSCC, 2017)

24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit. - Taejoong Song; Woojin Rim; Hoonki Kim; Keun Hwi Cho; Taeyeong Kim; Taejung Lee; Geumjong Bae; Dong-Won Kim; S. D. Kwon; Sanghoon Baek; Jonghoon Jung; Jongwook Kye; et al. (ISSCC, 2021)