An area-efficient standard-cell floating-point unit design for a processing-in-memory system. - Joong-Seok Moon; Taek-Jun Kwon; Jeff Sondeen; Jeffrey Draper (ESSCIRC, 2003)

A 0.18 µm implementation of a floating-point unit for a processing-in-memory system. - Taek-Jun Kwon; Joong-Seok Moon; Jeff Sondeen; Jeffrey T. Draper (ISCAS (2), 2004)

Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. - Taek-Jun Kwon; Jeff Sondeen; Jeffrey T. Draper (ISCAS (4), 2005)

A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. - Tim Barrett; Sumit D. Mediratta; Taek-Jun Kwon; Ravinder Singh; Sachit Chandra; Jeff Sondeen; Jeffrey T. Draper (ISCAS, 2006)

Floating-point division and square root implementation using a Taylor-series expansion algorithm. - Taek-Jun Kwon; Jeff Sondeen; Jeff Draper (ICECS, 2008)

Dynamic packet fragmentation for increased virtual channel utilization in on-chip routers. - Young Hoon Kang; Taek-Jun Kwon; Jeff Draper (NOCS, 2009)

Floating-point division and square root using a Taylor-series expansion algorithm. - Taek-Jun Kwon; Jeffrey T. Draper (Microelectron. J., 2009)

Implementation of adaptive grain signatures for transactional memories. - Woojin Choi; Young Hoon Kang; Taek-Jun Kwon; Jeff Draper (ISCAS, 2010)

Fault-Tolerant Flow Control in On-chip Networks. - Young Hoon Kang; Taek-Jun Kwon; Jeffrey T. Draper (NOCS, 2010)