An Effective Programmable Memory BIST for Embedded Memory. - Youngkyu Park; Jaeseok Park; Taewoo Han 001; Sungho Kang 001 (IEICE Trans. Inf. Syst., 2009)

An Advanced BIRA for Memories With an Optimal Repair Rate and Fast Analysis Speed by Using a Branch Analyzer. - Woosik Jeong; Joohwan Lee; Taewoo Han 001; Kaangchil Lee; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Path search engine for fast optimal path search using efficient hardware architecture. - Inhyuk Choi; Taewoo Han 001; Ilwoong Kim; Sungho Kang 001 (ISOCC, 2011)

Bit transmission error correction scheme for FlexRay based automotive communication systems. - Inhyuk Choi; Taewoo Han 001; Sungho Kang 001 (GCCE, 2013)

A Scalable and Parallel Test Access Strategy for NoC-Based Multicore System. - Taewoo Han 001; Inhyuk Choi; Hyunggoy Oh; Sungho Kang 001 (ATS, 2014)

A novel test access mechanism for parallel testing of multi-core system. - Taewoo Han 001; Inhyuk Choi; Sungho Kang 001 (IEICE Electron. Express, 2014)

Majority-Based Test Access Mechanism for Parallel Testing of Multiple Identical Cores. - Taewoo Han 001; Inhyuk Choi; Sungho Kang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Parallelized Network-on-Chip-Reused Test Access Mechanism for Multiple Identical Cores. - Taewoo Han 001; Inhyuk Choi; Hyunggoy Oh; Sungho Kang 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

An On-Chip Error Detection Method to Reduce the Post-Silicon Debug Time. - Hyunggoy Oh; Taewoo Han 001; Inhyuk Choi; Sungho Kang 001 (IEEE Trans. Computers, 2017)