PaRS: fast and near-optimal grid-based cell sizing for library-based design. - Tai-Hsuan Wu; Azadeh Davoodi (ICCAD, 2008)

Adjustment-based modeling for statistical static timing analysis with high dimension of variability. - Lin Xie; Azadeh Davoodi; Jun Zhang; Tai-Hsuan Wu (ICCAD, 2008)

SynECO: Incremental technology mapping with constrained placement and fast detail routing for predictable timing improvement. - Anuj Kumar; Tai-Hsuan Wu; Azadeh Davoodi (ICCD, 2008)

A Parallel and Randomized Algorithm for Large-Scale Discrete Dual-Vt Assignment and Continuous Gate Sizing. - Tai-Hsuan Wu; Lin Xie; Azadeh Davoodi (J. Low Power Electron., 2008)

GRIP: scalable 3D global routing using integer programming. - Tai-Hsuan Wu; Azadeh Davoodi; Jeffrey T. Linderoth (DAC, 2009)

PaRS: Parallel and Near-Optimal Grid-Based Cell Sizing for Library-Based Design. - Tai-Hsuan Wu; Azadeh Davoodi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Adjustment-Based Modeling for Timing Analysis Under Variability. - Lin Xie; Azadeh Davoodi; Jun Zhang; Tai-Hsuan Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

A parallel integer programming approach to global routing. - Tai-Hsuan Wu; Azadeh Davoodi; Jeffrey T. Linderoth (DAC, 2010)

A pareto-algebraic framework for signal power optimization in global routing. - Hamid Shojaei; Tai-Hsuan Wu; Azadeh Davoodi; Twan Basten (ISLPED, 2010)

Power-driven global routing for multi-supply voltage domains. - Tai-Hsuan Wu; Azadeh Davoodi; Jeff T. Linderoth (DATE, 2011)

GRIP: Global Routing via Integer Programming. - Tai-Hsuan Wu; Azadeh Davoodi; Jeffrey T. Linderoth (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Power-Driven Global Routing for Multisupply Voltage Domains. - Tai-Hsuan Wu; Azadeh Davoodi; Jeffrey T. Linderoth (VLSI Design, 2013)