Software-Based Self-Testing With Multiple-Level Abstractions for Soft Processor Cores. - Chung-Ho Chen; Chih-Kai Wei; Tai-Hua Lu; Hsun-Wei Gao (IEEE Trans. Very Large Scale Integr. Syst., 2007)

A hybrid self-testing methodology of processor cores. - Tai-Hua Lu; Chung-Ho Chen; Kuen-Jong Lee (ISCAS, 2008)

A hybrid software-based self-testing methodology for embedded processor. - Tai-Hua Lu; Chung-Ho Chen; Kuen-Jong Lee (SAC, 2008)

Effective Hybrid Test Program Development for Software-Based Self-Testing of Pipeline Processor Cores. - Tai-Hua Lu; Chung-Ho Chen; Kuen-Jong Lee (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A testable and debuggable dual-core system with thermal-aware dynamic voltage and frequency scaling. - Liang-Ying Lu; Ching-Yao Chang; Zhao-Hong Chen; Bo-Ting Yeh; Tai-Hua Lu; Peng-Yu Chen; Pin-Hao Tang; Kuen-Jong Lee; Lih-Yih Chiou; Soon-Jyh Chang; Chien-Hung Tsai; Chung-Ho Chen; et al. (ASP-DAC, 2016)