Minimizing Power for Neural Network Training with Logarithm-Approximate Floating-Point Multiplier. - TaiYu Cheng; Jaehoon Yu; Masanori Hashimoto (PATMOS, 2019)

Logarithm-approximate floating-point multiplier is applicable to power-efficient neural network training. - TaiYu Cheng; Yukata Masuda; Jun Chen; Jaehoon Yu; Masanori Hashimoto (Integr., 2020)

Mode-wise Voltage-scalable Design with Activation-aware Slack Assignment for Energy Minimization. - TaiYu Cheng; Yukata Masuda; Jun Nagayama; Yoichi Momiyama; Jun Chen; Masanori Hashimoto (ASP-DAC, 2021)

Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design. - Yutaka Masuda; Jun Nagayama; TaiYu Cheng; Tohru Ishihara; Yoichi Momiyama; Masanori Hashimoto (DATE, 2021)

Minimizing Energy of DNN Training with Adaptive Bit-Width and Voltage Scaling. - TaiYu Cheng; Masanori Hashimoto (ISCAS, 2021)

Activation-Aware Slack Assignment Based Mode-Wise Voltage Scaling for Energy Minimization. - TaiYu Cheng; Yutaka Masuda; Jun Nagayama; Yoichi Momiyama; Jun Chen; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022)

Low-Power Design Methodology of Voltage Over-Scalable Circuit with Critical Path Isolation and Bit-Width Scaling. - Yutaka Masuda; Jun Nagayama; TaiYu Cheng; Tohru Ishihara; Yoichi Momiyama; Masanori Hashimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022)