Extraction of threshold voltage degradation modeling due to Negative Bias Temperature Instability in circuits with I/O measurements. - Soonyoung Cha; Chang-Chih Chen; Taizhi Liu; Linda S. Milor (VTS, 2014)

Accurate standard cell characterization and statistical timing analysis using multivariate adaptive regression splines. - Taizhi Liu; Chang-Chih Chen; Linda S. Milor (ISQED, 2015)

Estimation of remaining life using embedded SRAM for wearout parameter extraction. - Woongrae Kim; Chang-Chih Chen; Taizhi Liu; Soonyoung Cha; Linda Milor (IWASI, 2015)

Processor-level reliability simulator for time-dependent gate dielectric breakdown. - Chang-Chih Chen; Taizhi Liu; Soonyoung Cha; Linda S. Milor (Microprocess. Microsystems, 2015)

The die-to-die calibrated combined model of negative bias temperature instability and gate oxide breakdown from device to system. - Soonyoung Cha; Dae Hyun Kim 003; Taizhi Liu; Linda S. Milor (Microelectron. Reliab., 2015)

System-level variation-aware aging simulator using a unified novel gate-delay model for bias temperature instability, hot carrier injection, and gate oxide breakdown. - Taizhi Liu; Chang-Chih Chen; Soonyoung Cha; Linda Milor (Microelectron. Reliab., 2015)

Comprehensive reliability and aging analysis on SRAMs within microprocessor systems. - Taizhi Liu; Chang-Chih Chen; Woongrae Kim; Linda Milor (Microelectron. Reliab., 2015)

SRAM stability analysis for different cache configurations due to Bias Temperature Instability and Hot Carrier Injection. - Taizhi Liu; Chang-Chih Chen; Jiadong Wu; Linda S. Milor (ICCD, 2016)

System-Level Modeling of Microprocessor Reliability Degradation Due to Bias Temperature Instability and Hot Carrier Injection. - Chang-Chih Chen; Taizhi Liu; Linda Milor (IEEE Trans. Very Large Scale Integr. Syst., 2016)

On-line monitoring of system health using on-chip SRAMs as a wearout sensor. - Woongrae Kim; Taizhi Liu; Linda Milor (IOLTS, 2017)

Front-end of line and middle-of-line time-dependent dielectric breakdown reliability simulator for logic circuits. - Kexin Yang 001; Taizhi Liu; Rui Zhang 048; Dae Hyun Kim 003; Linda Milor (Microelectron. Reliab., 2017)

Analysis of time-dependent dielectric breakdown induced aging of SRAM cache with different configurations. - Rui Zhang 048; Taizhi Liu; Kexin Yang 001; Linda Milor (Microelectron. Reliab., 2017)

Negative Bias Temperature Instability and Gate Oxide Breakdown Modeling in Circuits With Die-to-Die Calibration Through Power Supply and Ground Signal Measurements. - Soonyoung Cha; Taizhi Liu; Linda Milor (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Optimal Accelerated Test Regions for Time- Dependent Dielectric Breakdown Lifetime Parameters Estimation in FinFET Technology. - Kexin Yang 001; Rui Zhang 048; Taizhi Liu; Dae Hyun Kim 003; Linda Milor (DCIS, 2018)

Estimation of the Optimal Accelerated Test Region for FinFET SRAMs Degraded by Front-End and Back-End Wearout Mechanisms. - Rui Zhang 048; Kexin Yang 001; Taizhi Liu; Linda Milor (DCIS, 2018)

Circuit-level reliability simulator for front-end-of-line and middle-of-line time-dependent dielectric breakdown in FinFET technology. - Kexin Yang 001; Taizhi Liu; Rui Zhang 048; Linda Milor (VTS, 2018)

Comprehensive Reliability-Aware Statistical Timing Analysis Using a Unified Gate-Delay Model for Microprocessors. - Taizhi Liu; Chang-Chih Chen; Linda Milor (IEEE Trans. Emerg. Top. Comput., 2018)

A Comprehensive Time-Dependent Dielectric Breakdown Lifetime Simulator for Both Traditional CMOS and FinFET Technology. - Kexin Yang 001; Taizhi Liu; Rui Zhang 048; Linda Milor (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Impact of Front-End Wearout Mechanisms on the Performance of a Ring Oscillator-Based Thermal Sensor. - Rui Zhang 048; Kexin Yang 001; Taizhi Liu; Linda Milor (IWASI, 2019)

Inverse Design of FinFET SRAM Cells. - Rui Zhang 048; Zhaocheng Liu; Kexin Yang 001; Taizhi Liu; Wenshan Cai; Linda Milor (IRPS, 2020)

SRAM Stability Analysis and Performance-Reliability Tradeoff for Different Cache Configurations. - Rui Zhang 048; Taizhi Liu; Kexin Yang 001; Chang-Chih Chen; Linda Milor (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A Comprehensive Framework for Analysis of Time-Dependent Performance-Reliability Degradation of SRAM Cache Memory. - Rui Zhang 048; Kexin Yang 001; Zhaocheng Liu; Taizhi Liu; Wenshan Cai; Linda Milor (IEEE Trans. Very Large Scale Integr. Syst., 2021)

CacheEM: For Reliability Analysis on Cache Memory Aging Due to Electromigration. - Rui Zhang 048; Taizhi Liu; Kexin Yang 001; Linda Milor (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)