Dynamic Multi-Context Reconfiguration Scheme for Reconfigurable Parallel Image Processing System with Three Dimensional Structure. - Takeaki Sugimura; Yuta Konishi; Yoshihiro Nakatani; Takafumi Fukushima; Hiroyuki Kurino; Mitsumasa Koyanagi (ARCS Workshops, 2005)

Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration. - Ji Chel Bea; Mariappan Murugesan; Yuki Ohara; Akihiro Noriki; Hisashi Kino; Kang Wook Lee 002; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2009)

Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch. - Takafumi Fukushima; Eiji Iwata; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2009)

A parallel ADC for high-speed CMOS image processing system with 3D structure. - Kouji Kiyoyama; Yuki Ohara; Kang Wook Lee 002; Y. Yang; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2009)

Heterogeneous integration technology for MEMS-LSI multi-chip module. - Kang Wook Lee 002; Shigeyuki Kanno; Yuki Ohara; Kouji Kiyoyama; Ji Chel Bea; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2009)

10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack. - Yuki Ohara; Akihiro Noriki; Katsuyuki Sakuma; Kang Wook Lee 002; Mariappan Murugesan; Jichoel Bea; Fumiaki Yamada; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2009)

Three-dimensional integration technology and integrated systems. - Mitsumasa Koyanagi; Takafumi Fukushima; Tetsu Tanaka (ASP-DAC, 2009)

High-Density Through Silicon Vias for 3-D LSIs. - Mitsumasa Koyanagi; Takafumi Fukushima; Tetsu Tanaka (Proc. IEEE, 2009)

Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature. - Takafumi Fukushima; Eiji Iwata; Jichoel Bea; Mariappan Murugesan; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2010)

A block-parallel signal processing system for CMOS image sensor with three-dimensional structure. - Kouji Kiyoyama; Kang Wook Lee 002; Takafumi Fukushima; H. Naganuma; Hiroaki Kobayashi; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2010)

Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding. - Mariappan Murugesan; Yuki Ohara; Jichoel Bea; Kang Wook Lee 002; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2010)

Through Silicon photonic via (TSPV) with Si core for low loss and high-speed data transmission in opto-electronic 3-D LSI. - Akihiro Noriki; Kang Wook Lee 002; Jichoel Bea; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2010)

Three-dimensional integration technology using through-si via based on reconfigured wafer-to-wafer bonding. - Mitsumasa Koyanagi; Takafumi Fukushima; Tetsu Tanaka (CICC, 2010)

Temporary bonding strength control for self-assembly-based 3D integration. - Takafumi Fukushima; Yuki Ohara; Jichoel Bea; Mariappan Murugesan; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

Chip-level TSV integration for rapid prototyping of 3D system LSIs. - Kazuyuki Hozawa; Futoshi Furuta; Yuko Hanaoka; Mayu Aoki; Kenichi Takeda; Katsuyuki Sakuma; Kang Wook Lee 002; Takafumi Fukushima; Mitsumasa Koyanagi (3DIC, 2011)

High-bandwidth data transmission of new transceiver module through optical interconnection. - Yuka Ito; Shinsuke Terada; Shinya Arai; Koji Choki; Takafumi Fukushima; Mitsumasa Koyanagi (3DIC, 2011)

A very low area ADC for 3-D stacked CMOS image processing system. - Kouji Kiyoyama; Kang Wook Lee 002; Takafumi Fukushima; H. Naganuma; H. Kobayashi; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs. - Kang Wook Lee 002; Jichoel Bea; Takafumi Fukushima; Yuki Ohara; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

Stacked SOI pixel detector using versatile fine pitch μ-bump technology. - Makoto Motoyoshi; Junichi Takanohashi; Takafumi Fukushima; Yasuo Arai; Mitsumasa Koyanagi (3DIC, 2011)

W/Cu TSVs for 3D-LSI with minimum thermo-mechanical stress. - Mariappan Murugesan; Hideto Hashiguchi; Harufumi Kobayashi; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

High density Cu-TSVs and reliability issues. - Mariappan Murugesan; Harufumi Kobayashi; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI. - Akihiro Noriki; Kang Wook Lee 002; Jichoel Bea; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

Novel detachable bonding process with wettability control of bonding surface for versatile chip-level 3D integration. - Yuki Ohara; Kang Wook Lee 002; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2011)

Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration. - Takafumi Fukushima; Takayuki Konno; Eiji Iwata; Risato Kobayashi; Toshiya Kojima; Mariappan Murugesan; Ji Chel Bea; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (Micromachines, 2011)

Development of via-last 3D integration technologies using a new temporary adhesive system. - Takafumi Fukushima; Jichoel Bea; Mariappan Murugesan; Kang Wook Lee 002; Mitsumasa Koyanagi (3DIC, 2013)

3D memory chip stacking by multi-layer self-assembly technology. - Takafumi Fukushima; Jichoel Bea; Mariappan Murugesan; Ho-Young Son; Min-Suk Suh; K.-Y. Byun; N.-S. Kim; Kang Wook Lee 002; Mitsumasa Koyanagi (3DIC, 2013)

Highly efficient TSV repair technology for resilient 3-D stacked multicore processor system. - Hiroyuki Hashimoto; Takafumi Fukushima; Kang Wook Lee 002; Mitsumasa Koyanagi; Tetsu Tanaka (3DIC, 2013)

A block-parallel ADC with digital noise cancelling for 3-D stacked CMOS image sensor. - Kouji Kiyoyama; Y. Sato; Hiroyuki Hashimoto; Kang Wook Lee 002; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2013)

Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory. - Kang Wook Lee 002; Seiya Tanikawa; Mariappan Murugesan; H. Naganuma; Jichoel Bea; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2013)

Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV. - Mariappan Murugesan; Jichoel Bea; Kang Wook Lee 002; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi; Yuji Sutou; H. Wang; J. Koike (3DIC, 2013)

Tiny VCSEL chip self-assembly for advanced chip-to-wafer 3D and hetero integration. - Takafumi Fukushima; Yuka Ito; Mariappan Murugesan; Jicheol Bea; Kang Wook Lee 002; Koji Choki; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2014)

Effects of electro-less Ni layer as barrier/seed layers for high reliable and low cost Cu TSV. - K. W. Lee; Chisato Nagai; Ai Nakamura; Ji Chel Bea; Mariappan Murugesan; Takafumi Fukushima; Tanaka Tanaka; Mitsumasa Koyanagi (3DIC, 2014)

Micro-XRD investigation of fine-pitch Cu-TSV induced thermo-mechanical stress in high-density 3D-LSI. - Mariappan Murugesan; Takafumi Fukushima; Ji Chel Bea; K. W. Lee; Mitsu Koyanagi; Y. Imai; S. Kimura; Tetsu Tanaka (3DIC, 2014)

An empirical study of just-in-time defect prediction using cross-project models. - Takafumi Fukushima; Yasutaka Kamei; Shane McIntosh; Kazuhiro Yamashita; Naoyasu Ubayashi (MSR, 2014)

Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding. - Takafumi Fukushima; Taku Suzuki; Hideto Hashiguchi; Chisato Nagai; Jichoel Bea; Hiroyuki Hashimoto; Mariappan Murugesan; Kang Wook Lee 002; Tetsu Tanaka; Kazushi Asami; Yasuhiro Kitamura; Mitsumasa Koyanagi (3DIC, 2015)

Consideration of microbump layout for reduction of local bending stress due to CTE Mismatch in 3D IC. - Hisashi Kino; Hideto Hashiguchi; Seiya Tanikawa; Yohei Sugawara; Shunsuke Ikegaya; Takafumi Fukushima; Mitsumasa Koyanagi; Tetsu Tanaka (3DIC, 2015)

Advanced 2.5D/3D hetero-integration technologies at GINTI, Tohoku University. - K. W. Lee; Ji Chel Bea; Mitsu Koyanagi; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2015)

Reconfigured multichip-on-wafer (mCoW) Cu/oxide hybrid bonding technology for ultra-high density 3D integration using recessed oxide, thin glue adhesive, and thin metal capping layers. - K. W. Lee; Chisato Nagai; Ai Nakamura; Hiroki Aizawa; Ji Chel Bea; Mitsumasa Koyanagi; Hideto Hashiguchi; Takafumi Fukushima; Tanaka Tanaka (3DIC, 2015)

Mitigating thermo mechanical stress in high-density 3D-LSI through dielectric liners in Cu- through silicon Via _ µ-RS and µ-XRD study. - Mariappan Murugesan; Jichoel Bea; Hiroyuki Hashimoto; K. W. Lee; Mitsu Koyanagi; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2015)

Novel local stress evaluation method in 3D IC using DRAM cell array with planar mOS capacitors. - Seiya Tanikawa; Hisashi Kino; Takafumi Fukushima; Mitsumasa Koyanagi; Tetsu Tanaka (3DIC, 2015)

Vacuum-assisted-spin-coating of polyimide liner for high-aspect-ratio TSVs applications. - Yangyang Yan; Yingtao Ding; Qianwen Chen; Kang Wook Lee 002; Takafumi Fukushima; Mitsumasa Koyanagi (3DIC, 2015)

Impacts of 3-D integration processes on device reliabilities in thinned DRAM chip for 3-D DRAM. - Kang Wook Lee 002; Ji Chel Bea; Mariappan Murugesan; Takafumi Fukushima; Tetsu Tanaka; Mitsumasa Koyanagi (IRPS, 2015)

New concept of TSV formation methodology using Directed Self-Assembly (DSA). - Takafumi Fukushima; Mariappan Murugesan; Shin Ohsaki; Hiroyuki Hashimoto; Jichoel Bea; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2016)

Drastic reduction of keep-out-zone in 3D-IC by local stress suppression with negative-CTE filler. - Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2016)

Nano-scale Cu direct bonding using ultra-high density Cu nano-pillar (CNP) for high yield exascale 2.5/3D integration applications. - Kang Wook Lee 002; Ai Nakamura; Jicheol Bea; Takafumi Fukushima; Suresh Ramalingam; Xin Wu; Tanaka Tanaka; Mitsumasa Koyanagi (3DIC, 2016)

Improving the integrity of Ti barrier layer in Cu-TSVs through self-formed TiSix for via-last TSV technology. - Mariappan Murugesan; Jichel Bea; Takafumi Fukushima; Makoto Motoyoshi; Tetsu Tanaka; Mitsumasa Koyanagi (3DIC, 2016)

Studying just-in-time defect prediction using cross-project models. - Yasutaka Kamei; Takafumi Fukushima; Shane McIntosh; Kazuhiro Yamashita; Naoyasu Ubayashi; Ahmed E. Hassan (Empir. Softw. Eng., 2016)

Oxide-Oxide Thermocompression Direct Bonding Technologies with Capillary Self-Assembly for Multichip-to-Wafer Heterogeneous 3D System Integration. - Takafumi Fukushima; Hideto Hashiguchi; Hiroshi Yonekura; Hisashi Kino; Mariappan Murugesan; Ji Chel Bea; Kang Wook Lee 002; Tetsu Tanaka; Mitsumasa Koyanagi (Micromachines, 2016)

Experimental evaluation of stimulus current generator with Laplacian edge-enhancement for 3-D stacked retinal prosthesis chip. - Kenji Shimokawa; Zhengyang Qian; Yoshiki Takezawa; Hisashi Kino; Takafumi Fukushima; Kouji Kiyoyama; Tetsu Tanaka (BioCAS, 2017)

Ultrawide range square wave impedance analysis circuit with ultra-slow ring-oscillator using gate-induced drain-leakage current. - Yoshiki Takezawa; Koji Kiyoyama; Kenji Shimokawa; Zhengyang Qian; Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (BioCAS, 2017)

Continuous Peripheral Blood Pressure Measurement with ECG and PPG Signals at Fingertips. - Kar Mun Lee; Zhengyang Qian; Ryosuke Yabuki; Bang Du; Hisashi Kino; Takafumi Fukushima; Koji Kiyoyama; Tetsu Tanaka (BioCAS, 2018)

Intra- and inter-chip electrical interconnection formed by directed self assembly of nanocomposite containing diblock copolymer and nanometal. - Mariappan Murugesan; Takafumi Fukushima; Ji Chel Bea; Hiroyuki Hashimoto; Mitsu Koyanagi (IRPS, 2018)

Investigation of the Underfill with Negative-Thermal-Expansion Material to Suppress Mechanical Stress in 3D Integration System. - Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2019)

Development of a CDS Circuit for 3-D Stacked Neural Network Chip using CMOS Analog Signal Processing. - Koji Kiyoyama; Qian Zhengy; Hiroyuki Hashimoto; Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2019)

Cu-Cu Bonding Challenges with 'i-ACF' for Advanced 3D Integration. - Shunji Kurooka; Yoshinori Hotta; Ai Nakamura; Mitsumasa Koyanagi; Takafumi Fukushima (3DIC, 2019)

Development of 3D-IC Embedded Flexible Hybrid System. - Sungho Lee; Yuki Susumago; Zhengyang Qian; Noriyuki Takahashi; Hisashi Kino; Tetsu Tanaka; Takafumi Fukushima (3DIC, 2019)

Impacts of Deposition Temperature and Annealing Condition on Ozone-Ethylene Radical Generation-TEOS-CVD SiO2 for Low-Temperature TSV Liner Formation. - Rui Liang; Sungho Lee; Yuki Miwa; Kousei Kumahara; Mariappan Murugesan; Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2019)

Characterization of Low-Height Solder Microbump Bonding for Fine-Pitch Inter-Chip Connection in 3DICs. - Yuki Miwa; Sungho Lee; Rui Liang; Kousei Kumahara; Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2019)

Growth Optimization of Multi-Layer Graphene for Thermal-TSV Application in 3D-LSI. - Mariappan Murugesan; Mitsumasa Koyanagi; Takafumi Fukushima (3DIC, 2019)

Fabrication and Morphological Characterization of Nano-Scale Interconnects for 3D-Integration. - Mariappan Murugesan; Mitsumasa Koyanagi; Hiroyuki Hashimoto; Ji Chel Bea; Takafumi Fukushima (3DIC, 2019)

PPG and SpO2 Recording Circuit with Ambient Light Cancellation for Trans-Nail Pulse-Wave Monitoring System. - Ryosuke Yabuki; Tetsu Tanaka; Zhengyang Qian; Kar Mun Lee; Bang Du; Filipe Alves Satake; Tasuku Fukushima; Hisashi Kino; Takafumi Fukushima; Koji Kiyoyama (BioCAS, 2019)

Integration of Damage-less Probe Cards Using Nano-TSV Technology for Microbumped Wafer Testing. - Takafumi Fukushima; Shinichi Sakuyama; Masatomo Takahashi; Hiroyuki Hashimoto; Jichoel Bea; Theodorus Marcello; Hisashi Kino; Tetsu Tanaka; Mitsumasa Koyanagi; Mariappan Murugesan (3DIC, 2021)

Design for 3-D Stacked Neural Network Circuit with Cyclic Analog Computing. - Koji Kiyoyama; Yoshihiko Horio; Takafumi Fukushima; Hiroyuki Hashimoto; Takemori Orima; Mitsumasa Koyanagi (3DIC, 2021)

Cu-Cu Direct Bonding Through Highly Oriented Cu Grains for 3D-LSI Applications. - Mariappan Murugesan; E. Sone; A. Simomura; Makoto Motoyoshi; Masahiro Sawa; K. Fukuda; Mitsumasa Koyanagi; Takafumi Fukushima (3DIC, 2021)

Design and Evaluation of Electronic-Microsaccade with Balanced Stimulation for Artificial Vision System. - Yaogan Liana; Zhengyang Qian; Bang Du; Jinming Ye; Kohei Nakamura; Shengwei Wang; Hisashi Kino; Takafumi Fukushima; Koji Kiyoyama; Tetsu Tanaka (BioCAS, 2021)

Chiplet-Based Advanced Packaging Technology from 3D/TSV to FOWLP/FHE. - Takafumi Fukushima (VLSI Circuits, 2021)

Implementation of Light and Dark Adaptation Function for High QOL 3D-Stacked Artificial Retina Chip. - Kohei Nakamura; Yaogan Liang; Bang Du; Shengwei Wang; Yuta Aruga; Bunta Inoue; Hisashi Kino; Takafumi Fukushima; Koji Kiyoyama; Tetsu Tanaka (BioCAS, 2022)

3D-stacked retinal prosthesis chip with binary image capture and edge detection functions for human visual restoration. - Yaogan Liang; Bang Du; Kohei Nakamura; Shengwei Wang; Bunta Inoue; Yuta Aruga; Hisashi Kino; Takafumi Fukushima; Koji Kiyoyama; Tetsu Tanaka (IEICE Electron. Express, 2022)

Copper Electrode Surface Features and Cu-SiO2Hybrid Bonding. - Mariappan Murugesan; Masahiro Sawa; E. Sone; Makoto Motoyoshi; Mitsumasa Koyanagi; Takafumi Fukushima (3DIC, 2023)

Impact of Super-long-throw PVD on TSV Metallization and Die-to-Wafer 3D Integration Based on Via-last. - Jiayi Shen; Chang Liu; Tadaaki Hoshi; Atsushi Shinoda; Hisashi Kino; Tetsu Tanaka; Mariappan Murugesan; Mitsumasa Koyanagi; Takafumi Fukushima (3DIC, 2023)

Development of Trans-nail PPG Controller Using Fingertip Blood Volume Changes to Enable Highly Accurate Motion Prediction. - Kohei Nakamura; Bang Du; Keishun Sugishita; Ryo Hasegawa; Hisashi Kino; Takafumi Fukushima; Koji Kiyoyama; Tetsu Tanaka (BioCAS, 2023)

Antioxidative Cu Electrodeposition for 3D Interconnects with Hybrid Bonding. - Ryo Aizawa; Masahiro Sawa; Jinta Nampo; Yurina Fukumoto; Murugesan Mariappan; Takafumi Fukushima (3DIC, 2024)

Supression of TSV-Induced Stress by Using Negative Thermal Expansion Material. - Hisashi Kino; Takafumi Fukushima; Tetsu Tanaka (3DIC, 2024)

Impact of Cu Pad Density on Cu-CMP and Bonding Yield for Chip-to-Wafer Hybrid Bonding. - Mariappan Murugesan; Hiroyuki Hashimoto; Kentaro Mihara; Takashi Hare; Takafumi Fukushima; Fumihiro Inoue; Akira Uedono (3DIC, 2024)

Room-Temperature and Compressive Force-Free Metal-Metal Direct Bonding for Heterogeneous Integration of Micro-LED Array on 3D-IC. - Jiayi Shen; Chang Liu; Tetsu Tanaka; Takafumi Fukushima (3DIC, 2024)

Characterization of Ozone-Ethylene Radical Pretreatment for Hybrid Bonding without Water Rinsing Processes. - Bungo Tanaka; Tatsunori Shino; Murugesan Mariappan; Tetsu Tanaka; Takafumi Fukushima (3DIC, 2024)

Temporary Adhesive Effect on Multichip Thinning for Rapid Prototyping of 3D-IC from 2D-IC Fabricated in Foundry Shuttle Services. - Akihiro Tominaga; Jiayi Shen; Chang Liu; Atsushi Shinoda; Tetsu Tanaka; Takafumi Fukushima (3DIC, 2024)

16-Layer 3D Stacking Based on Self-Assembly Technology for HBM Application. - Du Zehua; Hiroshi Kikuchi; Hayato Hishinuma; Tetsu Tanaka; Takafumi Fukushima (3DIC, 2024)