A 400 K-transistor CMOS sea-of-gates array with continuous track allocation. - Masatomi Okabe; Yoshihiro Okuno; Takahiko Arakawa; Ichiro Tomioka; Takio Ohno; Tomoyoshi Noda; Masahiro Hatanaka; Yoichi Kuramitsu (IEEE J. Solid State Circuits, 1989)

A low power SRAM using auto-backgate-controlled MT-CMOS. - Koji Nii; Hiroshi Makino; Yoshiki Tsujihashi; Chikayoshi Morishima; Yasushi Hayakawa; Hiroyuki Nunogami; Takahiko Arakawa; Hisanori Hamano (ISLPED, 1998)

Modeling of NBTI Stress Induced Hole-Trapping and Interface-State-Generation Mechanisms under a Wide Range of Bias Conditions. - Chenyue Ma; Hans Jürgen Mattausch; Masataka Miyake; Takahiro Iizuka; Kazuya Matsuzawa; Seiichiro Yamaguchi; Teruhiko Hoshida; Akinori Kinoshita; Takahiko Arakawa; Jin He 003; Mitiko Miura-Mattausch (IEICE Trans. Electron., 2013)

Development of a Robust Ear Recognition Algorithm using Planar Approximation. - Takahiko Arakawa; Yuya Sato; Hitoshi Sakano; Tetsushi Ohki (APSIPA ASC, 2023)

The Unconstrained Ear Recognition Challenge 2023: Maximizing Performance and Minimizing Bias. - Ziga Emersic; Tetsushi Ohki; Muku Akasaka; Takahiko Arakawa; Soshi Maeda; Masora Okano; Yuya Sato; Anjith George; Sébastien Marcel; Iyyakutti Iyappan Ganapathi; Syed Sadaf Ali; Sajid Javed; et al. (IJCB, 2023)

MagSerea: Fingerprinting Magnetic Field of Specified Area with Wearable Sensors. - Tomoya Aiba; Takahiko Arakawa; Masakatsu Nishigaki; Tatsuya Mori; Tetsushi Ohki (MobileHCI (Companion), 2024)