A Single-Power-Supply 0.7V 1GHz 45nm SRAM with An Asymmetrical Unit-×-ratio Memory Cell. - Atsushi Kawasumi; Tomoaki Yabe; Yasuhisa Takeyama; Osamu Hirabayashi; Keiichi Kushida; Akihito Tohata; Takahiko Sasaki; Akira Katayama; Gou Fukano; Yuki Fujimura; Nobuaki Otsuka (ISSCC, 2008)

Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation. - Akira Katayama; Tomoaki Yabe; Osamu Hirabayashi; Yasuhisa Takeyama; Keiichi Kushida; Takahiko Sasaki; Nobuaki Otsuka (ITC, 2008)

A process-variation-tolerant dual-power-supply SRAM with 0.179µm2 Cell in 40nm CMOS using level-programmable wordline driver. - Osamu Hirabayashi; Atsushi Kawasumi; Azuma Suzuki; Yasuhisa Takeyama; Keiichi Kushida; Takahiko Sasaki; Akira Katayama; Gou Fukano; Yuki Fujimura; Takaaki Nakazato; Yasushi Shizuki; Natsuki Kushiyama; et al. (ISSCC, 2009)

A 0.7 V Single-Supply SRAM With 0.495 µm2 Cell in 65 nm Technology Utilizing Self-Write-Back Sense Amplifier and Cascaded Bit Line Scheme. - Keiichi Kushida; Azuma Suzuki; Gou Fukano; Atsushi Kawasumi; Osamu Hirabayashi; Yasuhisa Takeyama; Takahiko Sasaki; Akira Katayama; Yuki Fujimura; Tomoaki Yabe (IEEE J. Solid State Circuits, 2009)

A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm2 cell in 32nm high-k metal-gate CMOS. - Yuki Fujimura; Osamu Hirabayashi; Takahiko Sasaki; Azuma Suzuki; Atsushi Kawasumi; Yasuhisa Takeyama; Keiichi Kushida; Gou Fukano; Akira Katayama; Yusuke Niki; Tomoaki Yabe (ISSCC, 2010)

A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology. - Tz-Yi Liu; Tian Hong Yan; Roy Scheuerlein; Yingchang Chen; Jeffrey KoonYee Lee; Gopinath Balakrishnan; Gordon Yee; Henry Zhang; Alex Yap; Jingwen Ouyang; Takahiko Sasaki; Sravanti Addepalli; et al. (ISSCC, 2013)

A 130.7-mm2 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology. - Tz-Yi Liu; Tian Hong Yan; Roy Scheuerlein; Yingchang Chen; Jeffrey KoonYee Lee; Gopinath Balakrishnan; Gordon Yee; Henry Zhang; Alex Yap; Jingwen Ouyang; Takahiko Sasaki; Ali Al-Shamma; et al. (IEEE J. Solid State Circuits, 2014)