A 500-dpi cellular-logic processing array for fingerprint-image enhancement and verification. - Koji Fujii; Mamoru Nakanishi; Satoshi Shigematsu; Hiroki Morimura; Takahiro Hatano; Namiko Ikeda; Toshishige Shimamura; Yukio Okazaki; Hakaru Kyuragi (CICC, 2002)

A Fingerprint Verification Algorithm Using the Differential Matching Rate. - Takahiro Hatano; Takuya Adachi; Satoshi Shigematsu; Hiroki Morimura; Shigehiko Onishi; Yukio Okazaki; Hakaru Kyuragi (ICPR (3), 2002)

Fingerprint Image Enhancement by Pixel-Parallel Processing. - Namiko Ikeda; Mamoru Nakanishi; Koji Fujii; Takahiro Hatano; Satoshi Shigematsu; Takuya Adachi; Yukio Okazaki; Hakaru Kyuragi (ICPR (3), 2002)

Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and Identifier. - Satoshi Shigematsu; Koji Fujii; Hiroki Morimura; Takahiro Hatano; Mamoru Nakanishi; Namiko Ikeda; Toshishige Shimamura; Katsuyuki Machida; Yukio Okazaki; Hakaru Kyuragi (IEICE Trans. Electron., 2006)

Fingerprint Verification Using Perturbation Method. - Satoshi Otaka; Yoshihisa Nishiyama; Takahiro Hatano; Toru Wakahara (MVA, 2007)

Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSI. - Satoshi Shigematsu; Hiroki Morimura; Toshishige Shimamura; Takahiro Hatano; Namiko Ikeda; Yukio Okazaki; Katsuyuki Machida; Mamoru Nakanishi (IEICE Trans. Electron., 2007)

10G/1G dual-rate EPON OLT LSI with dual encryption modes alternated using DBA-information-based algorithm control. - Sadayuki Yasuda; Takahiro Hatano; Hiroki Suto; Masami Urano; Mamoru Nakanishi; Tsugumichi Shibata (ISOCC, 2011)

Lagopus FPGA - A reprogrammable data plane for high-performance software SDN switches. - Koji Yamazaki; Yoshihiro Nakajima; Takahiro Hatano; Akihiko Miyazaki (Hot Chips Symposium, 2015)

Hash-table and balanced-tree based FIB architecture for CCN routers. - Kenta Shimazaki; Takashi Aoki; Takahiro Hatano; Takuya Otsuka; Akihiko Miyazaki; Toshitaka Tsuda; Nozomu Togawa (ISOCC, 2016)

Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane. - Koji Yamazaki; Yuta Ukon; Shuhei Yoshida; Saki Hatta; Yusuke Sekihara; Shoko Ohteru; Tomoaki Kawamura; Takahiro Hatano; Koyo Nitta; Akihiko Miyazaki (HPSR, 2018)