An SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology. - Katsuhiro Suma; Takahiro Tsuruda; Hideto Hidaka; Takahisa Eimori; Toshiyuki Oashi; Yasuo Yamaguchi; Toshiaki Iwamatsu; Masakazu Hirose; Fukashi Morishita; Kazutarni Arimoto; Kazuyasu Fujishima; Yasuo Inoue; et al. (IEEE J. Solid State Circuits, 1994)

Low voltage circuit design techniques for battery-operated and/or giga-scale DRAMs. - Tadato Yamagata; Shigeki Tomishima; Masaki Tsukude; Takahiro Tsuruda; Yasushi Hashizume; Kazutami Arimoto (IEEE J. Solid State Circuits, 1995)

SOI-DRAM circuit technologies for low power high speed multigiga scale memories. - Shigehiro Kuge; Fukashi Morishita; Takahiro Tsuruda; Shigeki Tomishima; Masaki Tsukude; Tadato Yamagata; Kazutami Arimoto (IEEE J. Solid State Circuits, 1996)

High-speed/high-bandwidth design methodologies for on-chip DRAM core multimedia system LSI's. - Takahiro Tsuruda; Mako Kobayashi; Masaki Tsukude; Tadato Yamagata; Kazutami Arimoto; Michihiro Yamada (IEEE J. Solid State Circuits, 1997)

Computing Kitahara-Mizuno's bound on the number of basic feasible solutions generated with the simplex algorithm. - Takahito Kuno; Yoshio Sano; Takahiro Tsuruda (Optim. Lett., 2018)