A Hardware Accelerator for JavaTM Platforms on a 130-nm Embedded Processor Core. - Tetsuya Yamada; Naohiko Irie; Takanobu Tsunoda; Takahiro Irita; Kenji Kitagawa; Ryohei Yoshida; Keisuke Toyama 003; Motoaki Satoyama (IEICE Trans. Electron., 2007)

Heterogeneous Multi-Core Architecture That Enables 54x AAC-LC Stereo Encoding. - Hiroaki Shikano; Masaki Ito; Masafumi Onouchi; Takashi Todaka; Takanobu Tsunoda; Tomoyuki Kodama; Kunio Uchiyama; Toshihiko Odaka; Tatsuya Kamei; Ei Nagahama; Manabu Kusaoke; Yusuke Nitta; et al. (IEEE J. Solid State Circuits, 2008)