Accurate Small-Signal Modeling of FD-SOI MOSFETs. - Gue Chol Kim; Yoshiyuki Shimizu; Bunsei Murakami; Masaru Goto; Keisuke Ueda; Takao Kihara; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2006)

Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier. - Takao Kihara; Gue Chol Kim; Masaru Goto; Keiji Nakamura; Yoshiyuki Shimizu; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Analytical design of a 0.5V 5GHz CMOS LC-VCO. - Fumiaki Yamashita; Toshimasa Matsuoka; Takao Kihara; Isao Takobe; Hae-Ju Park; Kenji Taniguchi 001 (IEICE Electron. Express, 2009)

A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier. - Takao Kihara; Hae-Ju Park; Isao Takobe; Fumiaki Yamashita; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2009)

A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier. - Takao Kihara; Toshimasa Matsuoka; Kenji Taniguchi 001 (IEICE Trans. Electron., 2010)

Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation. - Toshimasa Matsuoka; Jun Wang 009; Takao Kihara; Hyunju Ham; Kenji Taniguchi 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

A Multiband LTE SAW-Less CMOS Transmitter with Source-Follower-Driven Passive Mixers, Envelope-Tracked RF-PGAs, and Marchand Baluns. - Takao Kihara; Tomohiro Sano; Masakazu Mizokami; Yoshikazu Furuta; Mitsuhiko Hokazono; Takaya Maruyama; Tetsuya Heima; Hisayasu Sato (IEICE Trans. Electron., 2013)

A low-voltage design of controller-based ADPLL for implantable biomedical devices. - Jung Nam Bae; Saichandrateja Radhapuram; Ikkyun Jo; Takao Kihara; Toshimasa Matsuoka (BioCAS, 2015)

Subharmonically injection-locked PLL with variable pulse-width injections. - Shuei Morishita; Shinji Shimizu; Takao Kihara; Tsutomu Yoshimura (ISCAS, 2015)

A low-power CMOS programmable frequency divider with novel retiming scheme. - Saichandrateja Radhapuram; Jung Nam Bae; Ikkyun Jo; Takao Kihara; Toshimasa Matsuoka (IEICE Electron. Express, 2015)

A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator. - Jung Nam Bae; Saichandrateja Radhapuram; Ikkyun Jo; Takao Kihara; Toshimasa Matsuoka (IEICE Trans. Electron., 2015)

A 2.6GHz subharmonically injection-locked PLL with low-spur and wide-lock-range injection. - Naohiro Fujii; Shuei Morishita; Takao Kihara; Tsutomu Yoshimura (NEWCAS, 2016)

Analysis and design of differential LNAs with on-chip transformers in 65-nm CMOS technology. - Takao Kihara; Shigesato Matsuda; Tsutomu Yoshimura (NEWCAS, 2016)

A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices. - Jung Nam Bae; Saichandrateja Radhapuram; Ikkyun Jo; Weimin Wang; Takao Kihara; Toshimasa Matsuoka (IEICE Trans. Electron., 2016)

Spur reduction by self-injection loop in a fractional-N PLL. - Mayu Kobayashi; Yuya Masui; Takao Kihara; Tsutomu Yoshimura (ICECS, 2017)

Digital correction of mismatches in time-interleaved ADCs for digital-RF receivers. - Tomoya Takahashi; Takao Kihara; Tsutomu Yoshimura (ICECS, 2017)

Design of cascaded integrator-comb decimation filters for direct-RF sampling receivers. - Takao Kihara; Hiroyuki Yano; Tsutomu Yoshimura (ISCAS, 2017)

A Polyphase Decimation Filter for Time-Interleaved ADCs in Direct-RF Sampling Receivers. - Yuma Isobe; Takao Kihara; Tsutomu Yoshimura (APCCAS, 2018)

Study of mutual injection pulling in a 5-GHz, 0.18-μm CMOS cascaded PLL. - Kazuki Miyao; Tatsuya Okafuji; Takao Kihara; Tsutomu Yoshimura (APCCAS, 2018)

A Standard-cell Based A/D Converter with a Back-gate VCO and a Fat Tree Encoder. - Fukuyama Tokuya; Takao Kihara; Tsunehiro Yoshio; Tsutomu Yoshimura (APCCAS, 2018)

First-Order Recursive CIC Filters in Time-Interleaved VCO-Based ADCs for Direct-RF Sampling Receivers. - Yuma Isobe; Takao Kihara (APCCAS, 2019)

Digital Third-Order Nonlinearity Correction for Time-Interleaved A/D Converters with VCOs. - Takao Kihara; Keisuke Miyakoshi; Tsutomu Yoshimura (ISCAS, 2019)

Digital Mismatch Correction for Bandpass Sampling Four-Channel Time-Interleaved ADCs in Direct-RF Sampling Receivers. - Takao Kihara; Tomoya Takahashi; Tsutomu Yoshimura (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Dynamic Reduction of Power Consumption in Direct-RF Sampling Receivers with Variable Decimation. - Yuka Nakamatsu; Takao Kihara (APCCAS, 2020)

Digital Background Correction for Channel Mismatch and Third-Order Nonlinearity of TI-ADCs with VCOs. - Takao Kihara (APCCAS, 2021)