Echo Canceler with Two Echo Path Models. - Kazuo Ochiai; Takashi Araseki; Takasi Ogihara (IEEE Trans. Commun., 1977)

Design and Performance of a DSI Terminal for Domestic Applications. - Rikio Maruta; Atsushi Tomozawa; Takao Nishitani; Tomonori Okada; Ken'Ichi Nakano; Takashi Araseki; Mutsunari Tajima (IEEE Trans. Commun., 1981)

A 32 kb/s toll quality ADPCM codec using a single chip signal processor. - Takao Nishitani; Shinichi Aikoh; Takashi Araseki; Kazunori Ozawa; Rikio Maruta (ICASSP, 1982)

A New Channel Bank with Block Companding. - Kunihiko Niwa; Takashi Araseki; Atsushi Tomozawa (IEEE Trans. Commun., 1982)

An adaptive echo canceller using digital signal processor LSI chips. - Kazunori Ozawa; Takashi Araseki; Yasuo Itoh (ICASSP, 1983)

A 16kbps APC codec using digital signal processors. - S. Tanaka; Y. Wake; Takashi Araseki; T. Sato; K. Kage (ICASSP, 1984)

A multi-pulse LPC speech codec using digital signal processors. - Y. Wake; S. Tanaka; Kazunori Ozawa; Takashi Araseki (ICASSP, 1985)

Linear transformation for low bit rate speech coding. - Shigeru Ono; Takashi Araseki (ICASSP, 1986)

Low bit rate multi-pulse speech coder with natural speech quality. - Kazunori Ozawa; Takashi Araseki (ICASSP, 1986)

High quality multi-pulse speech coder with pitch prediction. - Kazunori Ozawa; Takashi Araseki (ICASSP, 1986)

A Study on Pulse Search Algorithms for Multipulse Excited Speech Coder Realization. - Kazunori Ozawa; Shigeru Ono; Takashi Araseki (IEEE J. Sel. Areas Commun., 1986)