A capacitorless twin-transistor random access memory (TTRAM) on SOI. - Fukashi Morishita; Hideyuki Noda; Takayuki Gyohten; Mako Okamoto; Takashi Ipposhi; Shigeto Maegawa; Katsumi Dosaka; Kazutami Arimoto (CICC, 2005)

A Scalable ET2RAM (SETRAM) with Verify Control for SoC Platform Memory IP on SOI. - Kazutami Arimoto; Fukashi Morishita; Isamu Hayashi; Tetsushi Tanizaki; Takashi Ipposhi; Katsumi Dosaka (CICC, 2006)

Dynamic threshold voltage control for dual supply voltage scheme on PD-SOI. - Masaaki Iijima; Kenji Hamada; Masayuki Kitamura; Masahiro Numa; Akira Tada; Takashi Ipposhi (IEICE Electron. Express, 2006)

A 0.05?0.05mm2 RFID Chip with Easily Scaled-Down ID-Memory. - Mitsuo Usami; Hisao Tanabe; Akira Sato; Isao Sakama; Yukio Maki; Toshiaki Iwamatsu; Takashi Ipposhi; Yasuo Inoue (ISSCC, 2007)

Ultra Low Voltage Operation with Bootstrap Scheme for Single Power Supply SOI-SRAM. - Masaaki Iijima; Masayuki Kitamura; Masahiro Numa; Akira Tada; Takashi Ipposhi (VLSI Design, 2007)

Charge recycling in MTCMOS circuits with block dividing. - Akira Tada; Hiromi Notani; Genichi Tanaka; Takashi Ipposhi; Masaaki Iijima; Masahiro Numa (IEICE Electron. Express, 2007)

Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation. - Masaaki Iijima; Masayuki Kitamura; Masahiro Numa; Akira Tada; Takashi Ipposhi; Shigeto Maegawa (IEICE Trans. Electron., 2007)

Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM. - Masaaki Iijima; Kayoko Seto; Masahiro Numa; Akira Tada; Takashi Ipposhi (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI. - Fukashi Morishita; Hideyuki Noda; Isamu Hayashi; Takayuki Gyohten; Mako Okamoto; Takashi Ipposhi; Shigeto Maegawa; Katsumi Dosaka; Kazutami Arimoto (IEICE Trans. Electron., 2007)

A High-Density Scalable Twin Transistor RAM (TTRAM) With Verify Control for SOI Platform Memory IPs. - Kazutami Arimoto; Fukashi Morishita; Isamu Hayashi; Katsumi Dosaka; Hiroki Shimano; Takashi Ipposhi (IEEE J. Solid State Circuits, 2007)

A Configurable Enhanced TTRAM Macro for System-Level Power Management Unified Memory. - Fukashi Morishita; Isamu Hayashi; Takayuki Gyohten; Hideyuki Noda; Takashi Ipposhi; Hiroki Shimano; Katsumi Dosaka; Kazutami Arimoto (IEEE J. Solid State Circuits, 2007)

Delayed-ABC SOI for crosstalk noise repair. - Akira Tada; Hiromi Notani; Genichi Tanaka; Toshiaki Iwamatsu; Takashi Ipposhi; Masayuki Terai; Masaaki Iijima; Masahiro Numa (IEICE Electron. Express, 2008)

Low Power SRAM with Boost Driver Generating Pulsed Word Line Voltage for Sub-1V Operation. - Masaaki Iijima; Kayoko Seto; Masahiro Numa; Akira Tada; Takashi Ipposhi (J. Comput., 2008)

A Look-ahead Active Body-biasing scheme for SOI-SRAM with dynamic VDDM control. - Kayoko Seto; Masaaki Iijima; Tetsuya Hirose; Masahiro Numa; Akira Tada; Takashi Ipposhi (IEICE Electron. Express, 2009)