SHARPS: A hierarchical layout system for VLSI. - Toru Chiba; Noboru Okuda; Takashi Kambe; Ikuo Nishioka; Tsuneo Inufushi; Sieji Kimura (DAC, 1981)

A placement algorithm for polycell LSI and ITS evaluation. - Takashi Kambe; Toru Chiba; Seiji Kimura; Tsuneo Inufushi; Noboru Okuda; Ikuo Nishioka (DAC, 1982)

Optimal layout recycling based on graph theoretic linear programming approach. - Yuji Shigehiro; Takashi Nagata; Isao Shirakawa; Takashi Kambe (VLSI, 1993)

A layout approach to Monolithic Microwave IC. - Akira Nagao; Chiyoshi Yoshioka; Takashi Kambe; Isao Shirakawa (ASP-DAC, 1995)

Optimal Scheduling for Conditional Recource Sharing. - Akihisa Yamada 001; Satoru Nakamura; Nagisa Ishiura; Isao Shirakawa; Takashi Kambe (ISCAS, 1995)

VLSI Design and System Level Verification for the Mini-Disc. - Tetsuya Fujimoto; Takashi Kambe (DAC, 1996)

Hybrid floorplanning based on partial clustering and module restructuring. - Takayuki Yamanouchi; Kazuo Tamakashi; Takashi Kambe (ICCAD, 1996)

Architecture evaluation based on the datapath structure and parallel constraint. - Masayuki Yamaguchi; Akihisa Yamada 001; Toshihiro Nakaoka; Takashi Kambe (ASP-DAC, 1997)

A method of redundant clocking detection and power reduction at RT level design. - Mitsuhisa Ohnishi; Akihisa Yamada 001; Hiroaki Noda; Takashi Kambe (ISLPED, 1997)

Binding and Scheduling Algorithms for Highly Retargetable Compilation. - Masayuki Yamaguchi; Nagisa Ishiura; Takashi Kambe (ASP-DAC, 1998)

A layout approach to monolithic microwave IC. - Akira Nagao; Isao Shirakawa; Takashi Kambe (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

A Scheduling Method for Synchronous Communication in the Bach Hardware Compiler. - Ryoji Sakurai; Mizuki Takahashi; Andrew Kay; Akihisa Yamada 001; Tetsuya Fujimoto; Takashi Kambe (ASP-DAC, 1999)

Hardware synthesis with the Bach system. - Akihisa Yamada 001; Koichi Nishida; Ryoji Sakurai; Andrew Kay; Toshio Nomura; Takashi Kambe (ISCAS (6), 1999)

A cell synthesis method for salicide process. - Kazuhisa Okada; Takayuki Yamanouchi; Takashi Kambe (ASP-DAC, 2000)

Thread partitioning method for hardware compiler bach. - Mizuki Takahashi; Nagisa Ishiura; Akihisa Yamada 001; Takashi Kambe (ASP-DAC, 2000)

A C-based synthesis system, Bach, and its application (invited talk). - Takashi Kambe; Akihisa Yamada 001; Koichi Nishida; Kazuhisa Okada; Mitsuhisa Ohnishi; Andrew Kay; Paul Boca; Vince Zammit; Toshio Nomura (ASP-DAC, 2001)

Hardware Algorithm Optimization Using Bach C. - Kazuhisa Okada; Akihisa Yamada 001; Takashi Kambe (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

C-based design of a real time speech recognition system. - Takashi Kambe; H. Matsuno; Y. Miyazaki; Akihisa Yamada 001 (ISCAS, 2006)

A Variable Length Vector Pipeline Architecture Design Methodology. - Takashi Kambe; Makoto Saituji (DSD, 2008)

An application specific circuits design for a LVCSR system. - Akihiko Eguchi; Kazuya Kishida; Takashi Kambe; Makoto Saituji (ECCTD, 2009)

C-based system LSI design of a particle tracking technology. - Takashi Kambe (ECCTD, 2011)

An effective method to use GPU for rectangle packing. - Mitsuru Kataoka; Shuji Tsukiyamia; Takashi Kambe; Masahiro Fukui (NEWCAS, 2012)

A circuit synthesis algorithm for coarse grained dynamic reconfigurable circuits. - Nobuyuki Araki; Takashi Kambe (LASCAS, 2013)

Application-specific arithmetic circuit design for a particle tracking application. - Takashi Kambe; Kohsei Takehara; Shuji Tsukiyama (LASCAS, 2013)

A new delay distribution model to take long-term degradation into account. - Shuji Tsukiyama; Masahiro Fukui; Takashi Kambe (LASCAS, 2013)