A precharged-capacitor-assisted sensing (PCAS) scheme with novel level controllers for low-power DRAMs. - Takashi Kono; Takeshi Hamamoto; Katsuyoshi Mitsui; Yasuhiro Konishi; Tsutomu Yoshihara; Hideyuki Ozaki (IEEE J. Solid State Circuits, 2000)

A 0.18-μm 256-Mb DDR-SDRAM with low-cost post-mold tuning method for DLL replica. - Shigehiro Kuge; Tetsuo Kato; Kiyohiro Furutani; Shigeru Kikuda; Katsuyoshi Mitsui; Takeshi Hamamoto; Jun Setogawa; Kei Hamade; Yuichiro Komiya; Satoshi Kawasaki; Takashi Kono; Teruhiko Amano; et al. (IEEE J. Solid State Circuits, 2000)

A 667-Mb/s operating digital DLL architecture for 512-Mb DDR SDRAM. - Takeshi Hamamoto; Kiyohiro Furutani; Takashi Kubo; Satoshi Kawasaki; Hironori Iga; Takashi Kono; Yasuhiro Konishi; Tsutomu Yoshihara (IEEE J. Solid State Circuits, 2004)

Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous Memories. - Kiyohiro Furutani; Takeshi Hamamoto; Takeo Miki; Masaya Nakano; Takashi Kono; Shigeru Kikuda; Yasuhiro Konishi; Tsutomu Yoshihara (IEICE Trans. Electron., 2005)

40nm embedded SG-MONOS flash macros for automotive with 160MHz random access for code and endurance over 10M cycles for data. - Takashi Kono; Takashi Ito; Tamaki Tsuruda; Takayuki Nishiyama; Tsutomu Nagasawa; Tomoya Ogawa; Yoshiyuki Kawashima; Hideto Hidaka; Tadaaki Yamauchi (ISSCC, 2013)

40-nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macros for Automotive With 160-MHz Random Access for Code and Endurance Over 10 M Cycles for Data at the Junction Temperature of 170°C. - Takashi Kono; Takashi Ito; Tamaki Tsuruda; Takayuki Nishiyama; Tsutomu Nagasawa; Tomoya Ogawa; Yoshiyuki Kawashima; Hideto Hidaka; Tadaaki Yamauchi (IEEE J. Solid State Circuits, 2014)

Session 7 overview: Non-volatile memory solutions: Memory subcommittee. - Fatih Hamzaoglu; Takashi Kono (ISSCC, 2015)

7.3 A 28nm embedded SG-MONOS flash macro for automotive achieving 200MHz read operation and 2.0MB/S write throughput at Ti, of 170°C. - Yasuhiko Taito; Masaya Nakano; Hiromi Okimoto; Daisuke Okada; Takashi Ito; Takashi Kono; Kenji Noguchi; Hideto Hidaka; Tadaaki Yamauchi (ISSCC, 2015)

7.6 A 90nm embedded 1T-MONOS flash macro for automotive applications with 0.07mJ/8kB rewrite energy and endurance over 100M cycles under Tj of 175°C. - Hidenori Mitani; Ken Matsubara; Hiroshi Yoshida; Takashi Hashimoto; Hideaki Yamakoshi; Shinichiro Abe; Takashi Kono; Yasuhiko Taito; Takashi Ito; Takashi Krafuji; Kenji Noguchi; Hideto Hidaka; et al. (ISSCC, 2016)

A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170°C. - Yasuhiko Taito; Takashi Kono; Masaya Nakano; Tomoya Saito; Takashi Ito; Kenji Noguchi; Hideto Hidaka; Tadaaki Yamauchi (IEEE J. Solid State Circuits, 2016)

Session 11 overview: Nonvolatile memory solutions. - Takashi Kono; Ki-Tae Park; Leland Chang (ISSCC, 2017)

Embedded non-volatile memory system as an enabler of smarter world. - Takashi Kono (VLSI-DAT, 2017)

Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference. - Keith A. Bowman; Muhammad M. Khellah; Takashi Kono; Joseph Shor; Pui-In Mak (IEEE J. Solid State Circuits, 2018)

Overview of Embedded Flash Memory Technology. - Takashi Kono; Tomoya Saito; Tadaaki Yamauchi (Embedded Flash Memory for Embedded Systems, 2018)

A 24MB Embedded Flash System Based on 28nm SG-MONOS Featuring 240MHz Read Operations and Robust Over-The-Air Software Update for Automotive. - Akihiko Kanda; Takashi Kurafuji; Koichi Takeda; Tomoya Ogawa; Yasuhiko Taito; Kazuo Yoshihara; Masaya Nakano; Takashi Ito; Hiroyuki Kondo; Takashi Kono (VLSI Circuits, 2019)

A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications. - Ken Matsubara; Tsutomu Nagasawa; Yoshinobu Kaneda; Hidenori Mitani; Hiroshi Sato; Takashi Iwase; Yasunobu Aoki; Keiichi Maekawa; Hideaki Yamakoshi; Takashi Ito; Hiroyuki Kondo; Takashi Kono (VLSI Circuits, 2019)

Essential Roles, Challenges and Development of Embedded MCU Micro-Systems to Innovate Edge Computing for the IoT/AI Age. - Takashi Kono; Yasuhiko Taito; Hideto Hidaka (IEICE Trans. Electron., 2020)

A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier. - Masaya Nakano; Yoshinobu Kaneda; Koichi Takeda; Takahiro Shimoi; Yasunobu Aoki; Satoru Nakanishi; Yosuke Tashiro; Yasuhiko Taito; Ken Matsubara; Munekatsu Nakagawa; Tomoya Ogawa; Takashi Kurafuji; et al. (A-SSCC, 2021)

A 22nm 32Mb Embedded STT-MRAM Macro Achieving 5.9ns Random Read Access and 5.8MB/s Write Throughput at up to Tj of 150 °C. - Takahiro Shimoi; Ken Matsubara; Tomoya Saito; Tomoya Ogawa; Yasuhiko Taito; Yoshinobu Kaneda; Masayuki Izuna; Koichi Takeda; Hidenori Mitani; Takashi Ito; Takashi Kono (VLSI Technology and Circuits, 2022)

A 40-nm Embedded SG-MONOS Flash Macro for High-End MCU Achieving 200-MHz Random Read Operation and 7.91-Mb/mm2 Density With Charge-Assisted Offset Cancellation Sense Amplifier. - Masaya Nakano; Yoshinobu Kaneda; Satoru Nakanishi; Yasumitsu Murai; Yosuke Tashiro; Yasuhiko Taito; Tomoya Ogawa; Hidenori Mitani; Takashi Ito; Takashi Kono (IEEE J. Solid State Circuits, 2022)

An On-Chip DC-DC Converter and Power Management System Achieving Zero Standby-to-Active Transition Time in MCU. - Toyohiro Shimogawa; Makoto Nonaka; Toma Ogata; Toshiki Kiryu; Yasuto Igarashi; Kosuke Yayama; Masahiro Kitamura; Hiromichi Ishikura; Mitsuru Hiraki; Masao Ito; Takashi Kono (A-SSCC, 2023)

15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUs. - Tomoya Ogawa; Ken Matsubara; Yasuhiko Taito; Tomoya Saito; Masayuki Izuna; Koichi Takeda; Yoshinobu Kaneda; Takahiro Shimoi; Hidenori Mitani; Takashi Ito; Takashi Kono (ISSCC, 2024)

A 22-nm 32-Mb Embedded STT-MRAM Macro Achieving 5.9-ns Random Read Access and 7.4-MB/s Write Throughput at up to 150 °C. - Takahiro Shimoi; Ken Matsubara; Tomoya Saito; Tomoya Ogawa; Yasuhiko Taito; Yoshinobu Kaneda; Masayuki Izuna; Koichi Takeda; Hidenori Mitani; Takashi Ito; Takashi Kono (IEEE J. Solid State Circuits, 2024)