Multi-level placement with circuit schema based clustering in analog IC layouts. - Takashi Nojima; Xiaoke Zhu; Yasuhiro Takashima; Shigetoshi Nakatake; Yoji Kajitani (ASP-DAC, 2004)

A device-level placement with multi-directional convex clustering. - Takashi Nojima; Yasuhiro Takashima; Shigetoshi Nakatake; Yoji Kajitani (ACM Great Lakes Symposium on VLSI, 2004)

Adaptive Porting of Analog IPs with Reusable Conservative Properties. - Takashi Nojima; Nobuto Ono; Shigetoshi Nakatake; Toru Fujimura; Koji Okazaki; Yoji Kajitani (ISVLSI, 2006)

Formulating the Empirical Strategies in Module Generation of Analog MOS Layout. - Tan Yan; Shigetoshi Nakatake; Takashi Nojima (ISVLSI, 2006)