Dynamic fault recovery in mesh-connected parallel computers. - Takashi Yokota; Hideharu Amano; Hideo Aiso (Syst. Comput. Jpn., 1986)

Structural analysis of the mouse chromosomal gene encoding interleukin 4 which expresses B cell, T cell and mast cell stimulating activities. - Takeshi Otsuka; Douglas Villaret; Takashi Yokota; Yutaka Takebe; Frank Lee; Naoko Arai; Ken-ichi Arai (Nucleic Acids Res., 1987)

RICA: Reduced Interprocessor-Communication Architecture - Concept and Mechanisms. - Shuichi Sakai; Hiroshi Matsuoka; Yuetsu Kodama; Mitsuhisa Sato; Andrew Shaw; Hideo Hirono; Kazuaki Okamoto; Takashi Yokota (SPDP, 1993)

A prototype router for the massively parallel computer RWC-1. - Takashi Yokota; Hiroshi Matsuoka; Kazuaki Okamoto; Hideo Hirono; Atsushi Hori; Shuichi Sakai (ICCD, 1995)

Time Space Sharing Scheduling and Architectural Support. - Atsushi Hori; Takashi Yokota; Yutaka Ishikawa; Shuichi Sakai; Hiroki Konaka; Munenori Maeda; Takashi Tomokiyo; Jörg Nolte; Hiroshi Matsuoka; Kazuaki Okamoto; Hideo Hirono (JSSPP, 1995)

Reduced Interprocessor-Communication Architecture and its Implementation on EM-4. - Shuichi Sakai; Yuetsu Kodama; Mitsuhisa Sato; Andrew Shaw; Hiroshi Matsuoka; Hideo Hirono; Kazuaki Okamoto; Takashi Yokota (Parallel Comput., 1995)

Multithread execution mechanisms on RICA-1 for massively parallel computation. - Kazuaki Okamoto; Shuichi Sakai; Hiroshi Matsuoka; Takashi Yokota; Hideo Hirono (IEEE PACT, 1996)

Virtual control channel and its application to the massively parallel computer RWC-1. - Takashi Yokota; Hiroshi Matsuoka; Kazuaki Okamoto; Hideo Hirono; Shuichi Sakai (HiPC, 1997)

A Scalable FPGA-Based Custom Computing Machine for a Medical Image Processing. - Takashi Yokota; Masamichi Nagafuchi; Yoshito Mekada; Tsutomu Yoshinaga; Kanemitsu Ootsu; Takanobu Baba (FCCM, 2002)

Real-Time Medical Diagnosis on a Multiple FPGA-based System. - Takashi Yokota; Masamichi Nagafuchi; Yoshito Mekada; Tsutomu Yoshinaga; Kanemitsu Ootsu; Takanobu Baba (FPL, 2002)

A Methodology of Binary-level Multithreading and Its Preliminary Evaluation. - Kanemitsu Ootsu; Takafumi Ono; Takashi Yokota; Takanobu Baba (IASTED PDCS, 2002)

Receiving message prediction method. - Yoshiyuki Iwamoto; Koichi Suga; Kanemitsu Ootsu; Takashi Yokota; Takanobu Baba (Parallel Comput., 2003)

Cross-Line - A Globally Adaptive Control Method of Interconnection Network. - Takashi Yokota; Masashi Nishitani; Kanemitsu Ootsu; Fumihito Furukawa; Takanobu Baba (ISHPC, 2005)

Two-Path Limited Speculation Method for Static/Dynamic Optimization in Multithreaded Systems. - Takashi Yokota; Moriyuki Saito; Fumihito Furukawa; Kanemitsu Ootsu; Takanobu Baba (PDCAT, 2005)

Design and Implementation of a VLIW Processor Simulation Environment with Instruction Scheduling Framework. - Atsushi Tsukikawa; Fumihito Furukawa; Takayuki Aoki; Daisuke Oka; Kanemitsu Ootsu; Takashi Yokota; Takanobu Baba (IASTED PDCS, 2005)

Entropy Throttling: A Physical Approach for Maximizing Packet Mobility in Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu; Fumihito Furukawa; Takanobu Baba (Asia-Pacific Computer Systems Architecture Conference, 2006)

Introducing entropies for representing program behavior and branch predictor performance. - Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (Experimental Computer Science, 2007)

A thread partitioning technique for multithreaded execution along hot paths. - Kanemitsu Ootsu; Takahiko Kobayashi; Takashi Yokota; Takanobu Baba (Parallel and Distributed Computing and Networks, 2007)

Quasi-global routing for fault-tolerant high-performance interconnection networks. - Takashi Yokota; Masaaki Ogawa; Kanemitsu Ootsu; Takamitsu Baba (Parallel and Distributed Computing and Networks, 2007)

Potentials of Branch Predictors: From Entropy Viewpoints. - Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (ARCS, 2008)

Clustered Decoupled Software Pipelining on Commodity CMP. - Yuanming Zhang; Kanemitsu Ootsu; Takashi Yokota; Takanobu Baba (ICPADS, 2008)

Are Uniform Nerworks Scalable? - Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (PDCAT, 2008)

An Effective Throttling Method Based on Quasi-global Congestion Information. - Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (ISPAN, 2009)

Clustered Software Queue for Efficient Pipelined Multithreading. - Yuanming Zhang; Kanemitsu Ootsu; Takashi Yokota; Takanobu Baba (PDCAT, 2009)

A Quantitative Evaluation Methodology of Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (Inf. Media Technol., 2009)

Loop Performance Improvement for Min-cut Program Decomposition Method. - Kanemitsu Ootsu; Takeshi Abe; Takashi Yokota; Takanobu Baba (ICNC, 2010)

Automatic Thread Decomposition for Pipelined Multithreading. - Yuanming Zhang; Kanemitsu Ootsu; Takashi Yokota; Takanobu Baba (ICPADS, 2010)

Steady/Unsteady Communication Performance in Large-Scale Regular Networks. - Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (AINA Workshops, 2011)

Comparative Study of Path Prediction Method for Speculative Loop Execution. - Kazuhiro Kinkai; Takanobu Baba; Hiroyoshi Jutori; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (ICNC, 2012)

Proposal of Incremental Software Simulation for Reduction of Evaluation Time. - Atsushi Shina; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota; Takanobu Baba (ICNC, 2012)

A prototyping system for hardware distributed objects with diversity of programming languages design and preliminary evaluation. - Takeshi Ohkawa; Takashi Yokota; Kanemitsu Ootsu (FPT, 2013)

Runtime Overhead Reduction in Automated Parallel Processing System Using Valgrind. - Takayuki Hoshi; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2013)

Exploration of Highly Accurate Path Prediction Mechanism Using Detailed Path History. - Hiroyoshi Jutori; Takanobu Baba; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2013)

Efficient Data Communication Using Dynamic Switching of Compression Method. - Masayuki Omote; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2013)

A Cellular Automata Approach for Large-Scale Interconnection Network Simulation. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2013)

An automatic thread decomposition approach for pipelined multithreading. - Yuanming Zhang; Kanemitsu Ootsu; Takashi Yokota; Takanobu Baba (Int. J. High Perform. Comput. Netw., 2013)

Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application. - Takeshi Ohkawa; Daichi Uetake; Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (SIGARCH Comput. Archit. News, 2013)

Proposal of Highly Efficient Memory Access Method Using Locked-Cache on Soft-Core Processor with SIMD Operations. - Kosuke Hiraishi; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2015)

Efficient Translation and Execution Method for Automated Parallel Processing System by Using Valgrind. - Hiroyuki Obuchi; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2015)

Performance Improvement of Large-Scale Interconnection Network Simulator by Using GPU. - Yuki Suzuki; Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2015)

Entropy Throttling: Towards Global Congestion Control of Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2015)

An Android cluster system capable of dynamic node reconfiguration. - Yuki Sawada; Yusuke Arai; Kanemitsu Ootsu; Takashi Yokota; Takeshi Ohkawa (ICUFN, 2015)

Empirical performance study of speculative parallel processing on commercial multi-core CPU with hardware transactional memory. - Kanemitsu Ootsu; Yutaka Matsuno; Takeshi Ohkawa; Takashi Yokota; Takanobu Baba (SEPS@SPLASH, 2015)

Proposal of ROS-compliant FPGA Component for Low-Power Robotic Systems. - Kazushi Yamashina; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota (CoRR, 2015)

Relaxing Heavy Congestion by State Propagation. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (J. Inf. Process., 2015)

Introducing PSO for Optimal Packet Scheduling of Collective Communication. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2016)

cReComp: Automated Design Tool for ROS-Compliant FPGA Component. - Kazushi Yamashina; Hitomi Kimura; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota (MCSoC, 2016)

Architecture exploration of intelligent robot system using ros-compliant FPGA component. - Takeshi Ohkawa; Kazushi Yamashina; Takuya Matsumoto; Kanemitsu Ootsu; Takashi Yokota (RSP, 2016)

Enhancing Entropy Throttling: New Classes of Injection Control in Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2016)

Acceleration of Publish/Subscribe Messaging in ROS-compliant FPGA Component. - Yuhei Sugata; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota (HEART, 2017)

A Translation Method of ARM Machine Code to LLVM-IR for Binary Code Parallelization and Optimization. - Kohta Shigenobu; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2017)

Acceleration of Large-Scale CGH Generation Using Multi-GPU Cluster. - Shinpei Watanabe; Boaz Jessie Jackin; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai; Takanobu Baba (CANDAR, 2017)

Large-Scale Interconnection Network Simulation Methods Based on Cellular Automata. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2017)

Image Denoising Based on Human Visual Characteristics. - Yuichi Nonaka; Daisuke Yoshida; Takashi Yokota; Madoka Hasegawa; Kanemitsu Ootsu (ICAIP, 2017)

Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus. - Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota; Katsuya Kikuchi; Masahiro Aoyagi (MCSoC, 2017)

A Static Packet Scheduling Approach for Fast Collective Communication by Using PSO. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2017)

Performance of Android Cluster System Allowing Dynamic Node Reconfiguration. - Yuki Sawada; Yusuke Arai; Kanemitsu Ootsu; Takashi Yokota; Takeshi Ohkawa (Wirel. Pers. Commun., 2017)

Development of a Robot Car by Single Line Search Method for White Line Detection with FPGA. - Hiromichi Wakatsuki; Takao Kido; Kenta Arai; Yuhei Sugata; Kanemitsu Ootsu; Takashi Yokota; Takeshi Ohkawa (FPT, 2018)

An Implementation of LLVM Pass for Loop Parallelization Based on IR-Level Directives. - Kengo Jingu; Kohta Shigenobu; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR Workshops, 2018)

Monocular color-IR imaging system applicable for various light environments. - Yuichi Nonaka; Daisuke Yoshida; Shogo Kitamura; Takashi Yokota; Madoka Hasegawa; Kanemitsu Ootsu (ICCE, 2018)

Data Distribution Method for Fast Giga-scale Hologram Generation on a Multi-GPU Cluster. - Takanobu Baba; Shinpei Watanabe; Boaz Jessie Jackin; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai (ApPLIED@PODC, 2018)

Overcoming the difficulty of large-scale CGH generation on multi-GPU cluster. - Takanobu Baba; Shinpei Watanabe; Boaz Jessie Jackin; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai (GPGPU@PPoPP, 2018)

FPGA Components for Integrating FPGAs into Robot Systems. - Takeshi Ohkawa; Kazushi Yamashina; Hitomi Kimura; Kanemitsu Ootsu; Takashi Yokota (IEICE Trans. Inf. Syst., 2018)

A Genetic Approach for Accelerating Communication Performance by Node Mapping. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2018)

Realization and Preliminary Evaluation of MPI Runtime Environment on Android Cluster. - Masahiro Nissato; Hiroki Sugiyama; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (AINA, 2019)

Proposal of Scalable Vector Extension for Embedded RISC-V Soft-Core Processor. - Yoshiki Kimura; Tomoya Kikuchi; Kanemitsu Ootsu; Takashi Yokota (CANDAR Workshops, 2019)

High level synthesis of ROS protocol interpretation and communication circuit for FPGA. - Takeshi Ohkawa; Yuhei Sugata; Harumi Watanabe; Nobuhiko Ogura; Kanemitsu Ootsu; Takashi Yokota (RoSE@ICSE, 2019)

Directive-Based Parallelization of For-Loops at LLVM IR Level. - Kengo Jingu; Kohta Shigenobu; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (SNPD, 2019)

Fast Computation with Efficient Object Data Distribution for Large-Scale Hologram Generation on a Multi-GPU Cluster. - Takanobu Baba; Shinpei Watanabe; Boaz Jessie Jackin; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai (IEICE Trans. Inf. Syst., 2019)

Automatic Generation Tool of FPGA Components for Robots. - Takeshi Ohkawa; Kazushi Yamashina; Takuya Matsumoto; Kanemitsu Ootsu; Takashi Yokota (IEICE Trans. Inf. Syst., 2019)

Accelerating Large-Scale Interconnection Network Simulation by Cellular Automata Concept. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2019)

Reduction of Speech Data Posteriorgrams by Compressing Maximum-likelihood State Sequences in Query by Example. - Takashi Yokota; Kazunori Kojima; Shi-wook Lee; Yoshiaki Itoh 001 (APSIPA, 2020)

Development of Soft-Core Processor with Efficient Array Data Transfer Mechanism. - Tomoya Kikuchi; Yoshiki Kimura; Kanemitsu Ootsu; Takashi Yokota (CANDAR (Workshops), 2020)

Genetic Node-Mapping Methods for Rapid Collective Communications. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2020)

Development of RISC-V Based Soft-core Processor with Scalable Vector Extension for Embedded System. - Yoshiki Kimura; Kanemitsu Ootsu; Tatsuya Tsuchiya; Takashi Yokota (ACIT, 2021)

Investigation of Input Signal Representation to CNN for Improving SNR Classification Accuracy. - Shun Kojima; Yi Feng; Kazuki Maruta; Kanemitsu Ootsu; Takashi Yokota; Chang-Jun Ahn; Vahid Tarokh (VTC Fall, 2021)

Comparison of reinforcement learning in game AI. - Jintaro Nogae; Kanemitsu Ootsu; Takashi Yokota; Shun Kojima (SNPD-Summer, 2022)

Assembly code translation from ARM64 to RISC-V. - Tatsuya Tsuchiya; Kanemitsu Ootsu; Takashi Yokota; Shun Kojima (SNPD-Summer, 2022)

Towards Deep Learning-Guided Multiuser SNR and Doppler Shift Detection for Next-Generation Wireless Systems. - Shun Kojima; Yi Feng; Kazuki Maruta; Kanemitsu Ootsu; Takashi Yokota; Chang-Jun Ahn; Vahid Tarokh (VTC Spring, 2022)

On a Cup-Stacking Concept in Repetitive Collective Communication. - Takashi Yokota; Kanemitsu Ootsu; Shun Kojima (IEICE Trans. Inf. Syst., 2022)

Enhancing Cup-Stacking Method for Collective Communication. - Takashi Yokota; Kanemitsu Ootsu; Shun Kojima (IEICE Trans. Inf. Syst., 2023)

A Translation Method from 64-bit ARM Machine Code to LLVM IR for Binary-Level Optimization. - Satoki Nagao; Kanemitsu Ootsu; Takashi Yokota (CANDARW, 2024)

Alchemist: A Component-Oriented Development Tool of FPGA based on Publish/Subscribe Model. - Takeshi Ohkawa; Kenta Arai; Kanemitsu Ootsu; Takashi Yokota (ICCE, 2024)

Criticality and Tolerance in Injection Timing in Cup-Stacking Method for Collective Communication. - Takashi Yokota; Kanemitsu Ootsu (IEICE Trans. Inf. Syst., 2025)

On a Perturbation Concept in Regular Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu (IEICE Trans. Inf. Syst., 2025)