Innovation of Decision Support System - Matplan Based on Structure Matrix Supported by APL. - Takayuki Toyama; Masafusa Yauda (APL, 1988)

High-Speed Digital Double Sampling with Analog CDS on Column Parallel ADC Architecture for Low-Noise Active Pixel Sensor. - Yoshikazu Nitta; Yoshinori Muramatsu; Kiyotaka Amano; Takayuki Toyama; Jun Yamamoto; Koji Mishina; Atsushi Suzuki; Tadayuki Taura; Akihiko Kato; Masaru Kikuchi; Yukihiro Yasui; Hideo Nomura; et al. (ISSCC, 2006)

A 17.7Mpixel 120fps CMOS image sensor with 34.8Gb/s readout. - Takayuki Toyama; Koji Mishina; Koji Tsuchiya; Tatsuya Ichikawa; Hiroyuki Iwaki; Yuji Gendai; Hirotaka Murakami; Kenichi Takamiya; Hiroshi Shiroshita; Yoshinori Muramatsu; Toshihiro Furusawa (ISSCC, 2011)

A front-illuminated stacked global-shutter CMOS image sensor with multiple chip-on-chip integration. - Kentaro Akiyama; Yusuke Oike; Yoshiaki Kitano; Junichiro Fjimagari; Wakiyama Satoru; Yorito Sakano; Takayuki Toyama; Hayato Iwamoto; Takayuki Ezaki; Takuya Nakamura; Tetsunori Imaizumi; Nonaka Yasuhiro (3DIC, 2016)

An 8.3M-pixel 480fps global-shutter CMOS image sensor with gain-adaptive column ADCs and 2-on-1 stacked device structure. - Yusuke Oike; Kentaro Akiyama; Luong D. Hung; Wataru Niitsuma; Akihiko Kato; Mamoru Sato; Yuri Kato; Wataru Nakamura; Hiroshi Shiroshita; Yorito Sakano; Yoshiaki Kitano; Takuya Nakamura; et al. (VLSI Circuits, 2016)

8.3 M-Pixel 480-fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and Chip-on-Chip Stacked Integration. - Yusuke Oike; Kentaro Akiyama; Luong D. Hung; Wataru Niitsuma; Akihiko Kato; Mamoru Sato; Yuri Kato; Wataru Nakamura; Hiroshi Shiroshita; Yorito Sakano; Yoshiaki Kitano; Takuya Nakamura; et al. (IEEE J. Solid State Circuits, 2017)