Sequential Machines Having Quasi-Stable States. - Takeomi Tamesada (IEEE Trans. Computers, 1980)

Fault Detection of Combinational Circuits Based on Supply Current. - Masaki Hashizume; Takeomi Tamesada; Kazuhiro Yamada; Masaaki Kawakami (ITC, 1988)

High-speed addition and subtraction using a minimum redundant p-ary representation. - Takeomi Tamesada (Syst. Comput. Jpn., 1988)

Evaluation of a retrieval system using content addressable memory. - Masaki Hashizume; Hirosuke Yamamoto; Takeomi Tamesada; Toshiaki Hanibuti (Syst. Comput. Jpn., 1989)

High-speed multioperand addition and subtraction using a p-ary representation with necessary and minimum redundancy. - Takeomi Tamesada (Syst. Comput. Jpn., 1989)

A parameter adjustment method for analog circuits based on convex fuzzy decision using constraints of satisfactory level. - Masaki Hashizume; Takeomi Tamesada; Koji Nii (ICCD, 1990)

A Maximum Clique Derivation Algorithm for Simplification of Incompletely Specified Machines. - Masaki Hashizume; Takeomi Tamesada; Akio Sakamoto (ISCAS, 1994)

Algorithmic Test Generation for Supply Current Testing of TTL Combinational Circuits. - Toshimasa Kuchii; Masaki Hashizume; Takeomi Tamesada (Asian Test Symposium, 1996)

Supply Current Test for Unit-to-unit Variations of Electrical Characteristics in Gates. - Masaki Hashizume; Toshimasa Kuchii; Takeomi Tamesada (Asian Test Symposium, 1997)

A High-Speed IDDQ Sensor for Low-Voltage ICs. - Masaki Hashizume; Yukiya Miura; Masahiro Ichimiya; Takeomi Tamesada; Kozo Kinoshita (Asian Test Symposium, 1998)

Identification of Feedback Bridging Faults with Oscillation. - Masaki Hashizume; Hiroyuki Yotsuyanagi; Takeomi Tamesada (Asian Test Symposium, 1999)

High speed IDDQ test and its testability for process variation. - Masaki Hashizume; Hiroyuki Yotsuyanagi; Masahiro Ichimiya; Takeomi Tamesada; Masashi Takeda (Asian Test Symposium, 2000)

Testability Analysis of IDDQ Testing with Large Threshold Value. - Masaki Hashizume; Hiroyuki Yotsuyanagi; Takeomi Tamesada; Masashi Takeda (DFT, 2000)

CMOS Open Defect Detection Based on Supply Current in Time-Variable Electric Field and Supply Voltage Application. - Masaki Hashizume; Masahiro Ichimiya; Hiroyuki Yotsuyanagi; Takeomi Tamesada (Asian Test Symposium, 2001)

Sequential Redundancy Removal Using Test Generation and Multiple Unreachable States. - Hiroyuki Yotsuyanagi; Shinsuke Hata; Masaki Hashizume; Takeomi Tamesada (Asian Test Symposium, 2001)

CMOS open defect detection by supply current test. - Masaki Hashizume; Masahiro Ichimiya; Hiroyuki Yotsuyanagi; Takeomi Tamesada (DATE, 2001)

Test Pattern for Supply Current Test of Open Defects by Applying Time-Variable Electric Field. - Hiroyuki Yotsuyanagi; Masaki Hashizume; Taisuke Iwakiri; Masahiro Ichimiya; Takeomi Tamesada (DFT, 2001)

Test Time Reduction for I DDQ Testing by Arranging Test Vectors. - Hiroyuki Yotsuyanagi; Masaki Hashizume; Takeomi Tamesada (Asian Test Symposium, 2002)

Power Supply Circuit for High Speed Operation of Adiabatic Dynamic CMOS Logic Circuits. - Masaki Hashizume; Masashi Sato; Hiroyuki Yotsuyanagi; Takeomi Tamesada (DELTA, 2002)

Random Pattern Testability of the Open Defect Detection Method using Application of Time-variable Electric Field. - Hiroyuki Yotsuyanagi; Masaki Hashizume; Taisuke Iwakiri; Masahiro Ichimiya; Takeomi Tamesada (DELTA, 2002)

A BIST Circuit for IDDQ Tests. - Masaki Hashizume; Teppei Takeda; Hiroyuki Yotsuyanagi; Takeomi Tamesada; Yukiya Miura; Kozo Kinoshita (Asian Test Symposium, 2003)

I_DDQ Test Method Based on Wavelet Transformation for Noisy Current Measurement Environment. - Masaki Hashizume; Daisuke Yoneda; Hiroyuki Yotsuyanagi; Tetsuo Tada; Takeshi Koyama; Ikuro Morita; Takeomi Tamesada (Asian Test Symposium, 2004)

A Power Supply Circuit Recycling Charge in Adiabatic Dynamic CMOS Logic Circuits. - Daisuke Ezaki; Masaki Hashizume; Hiroyuki Yotsuyanagi; Takeomi Tamesada (DELTA, 2004)

CMOS Open Fault Detection by Appearance Time of Switching Supply Current. - Masaki Hashizume; Tetsuo Akita; Hiroyuki Yotsuyanagi; Takeomi Tamesada (DELTA, 2004)

Practical Fault Coverage of Supply Current Tests for Bipolar ICs. - Isao Tsukimoto; Masaki Hashizume; Hiroyuki Yotsuyanagi; Takeomi Tamesada (DELTA, 2004)

Identification and Frequency Estimation of Feedback Bridging Faults Generating Logical Oscillation in CMOS Circuits. - Masaki Hashizume; Hiroyuki Yotsuyanagi; Takeomi Tamesada (IEICE Trans. Inf. Syst., 2004)

Test Sequence Generation for Test Time Reduction of IDDQ Testing. - Hiroyuki Yotsuyanagi; Masaki Hashizume; Takeomi Tamesada (IEICE Trans. Inf. Syst., 2004)

A test circuit for pin shorts generating oscillation in CMOS logic circuits. - Masahiro Ichimiya; Masaki Hashizume; Hiroyuki Yotsuyanagi; Takeomi Tamesada (Syst. Comput. Jpn., 2004)

Electric field for detecting open leads in CMOS logic circuits by supply current testing. - Masaki Hashizume; Masahiro Ichimiya; Hiroyuki Yotsuyanagi; Takeomi Tamesada (ISCAS (3), 2005)

Current Testable Design of Resistor String DACs. - Masaki Hashizume; Tomomi Nishida; Hiroyuki Yotsuyanagi; Takeomi Tamesada; Yukiya Miura (DELTA, 2006)