AP1000 Architecture and Performance of LU Decomposition. - Takeshi Horie; Hiroaki Ishihata; Toshiyuki Shimizu; Sadayuki Kato; Satoshi Inano; Morio Ikesaka (ICPP (1), 1991)

Design and Implementation of an Interconnection Network for the AP1000. - Takeshi Horie; Hiroaki Ishihata; Morio Ikesaka (IFIP Congress (1), 1992)

Low-Latency Message Communication Support for the AP1000. - Toshiyuki Shimizu; Takeshi Horie; Hiroaki Ishihata (ISCA, 1992)

Improving AP1000 Parallel Computer Performance with Message Communication. - Takeshi Horie; Kenichi Hayashi; Toshiyuki Shimizu; Hiroaki Ishihata (ISCA, 1993)

Architecture of highly parallel ap1000 computer. - Hiroaki Ishihata; Toshiyuki Shimizu; Takeshi Horie; Satoshi Inano; Morio Ikesaka (Syst. Comput. Jpn., 1993)

AP1000+: Architectural Support of PUT/GET Interface for Parallelizing Compiler. - Kenichi Hayashi; Tsunehisa Doi; Takeshi Horie; Yoichi Koyanagi; Osamu Shiraki; Nobutaka Imamura; Toshiyuki Shimizu; Hiroaki Ishihata; Tatsuya Shindo (ASPLOS, 1994)

Synfinity II-a high-speed interconnect with 2 GBytes/sec self-configurable physical link. - Yoichi Koyanagi; Takeshi Horie; Takashi Miyoshi; Mitsuo Ishii (Hot Interconnects, 2001)

Parallel Retrieval of Complex Object Index for Complex Queries. - Takeshi Horie; Kazuhiro Ogura; Tatsuo Tsuji; Ken Higuchi; Teruhisa Hochin (CATA, 2003)

Sensitivity-Based Modeling and Methodology for Full-Chip Substrate Noise Analysis. - Rajeev Murgai; Subodh M. Reddy; Takashi Miyoshi; Takeshi Horie; Mehdi Baradaran Tahoori (DATE, 2004)

An Efficient Parallel Retrieval for Complex Object Index. - Takeshi Horie; Takuya Ukon; Tatsuo Tsuji; Ken Higuchi (ICDE Workshops, 2005)

Assessing the land-use change and carbon sink capacity in the slash-and-burn agriculture region of northern Laos. - Yoshio Inoue; Takeshi Horie; Yoshiyuki Kiyono; Yukihito Ochiai; Kazuki Saito; Hidetoshi Asai; Jiaguo Qi; Linkham Dounagsavanh; Tatsuhiko Shiraiwa (IGARSS, 2005)

Design Consideration of 6.25 Gbps Signaling for High-Performance Server. - Jian Hong Jiang; Weixin Gai; Akira Hattori; Yasuo Hidaka; Takeshi Horie; Yoichi Koyanagi; Hideki Osone (ASP-DAC, 2007)

A 4-Channel 3.1/10.3Gb/s Transceiver Macro with a Pattern-Tolerant Adaptive Equalizer. - Yasuo Hidaka; Weixin Gai; Akira Hattori; Takeshi Horie; Jian Jiang; Kouichi Kanda; Yoichi Koyanagi; Satoshi Matsubara; Hideki Osone (ISSCC, 2007)

A 4-channel 10.3Gb/s backplane transceiver macro with 35dB equalizer and sign-based zero-forcing adaptive control. - Yasuo Hidaka; Weixin Gai; Takeshi Horie; Jian Hong Jiang; Yoichi Koyanagi; Hideki Osone (ISSCC, 2009)

A 4-Channel 1.25-10.3 Gb/s Backplane Transceiver Macro With 35 dB Equalizer and Sign-Based Zero-Forcing Adaptive Control. - Yasuo Hidaka; Weixin Gai; Takeshi Horie; Jian Hong Jiang; Yoichi Koyanagi; Hideki Osone (IEEE J. Solid State Circuits, 2009)

A Single-Chip, 10-Gigabit Ethernet Switch LSI for Energy-Efficient Blade Servers. - Yukihiro Nakagawa; Takeshi Shimizu; Yoichi Koyanagi; Osamu Shiraki; Shinji Kobayashi; Kazuki Hyoudou; Takashi Miyoshi; Yuuki Ogata; Yasushi Umezawa; Takeshi Horie; Akira Hattori (GreenCom/CPSCom, 2010)

Assessing land-use and carbon stock in slash-and-burn ecosystems in tropical mountain of Laos based on time-series satellite images. - Yoshio Inoue; Yoshiyuki Kiyono; Hidetoshi Asai; Yukihito Ochiai; Jiaguo Qi; Albert Olioso; Tatsuhiko Shiraiwa; Takeshi Horie; Kazuki Saito; Linkham Dounagsavanh (Int. J. Appl. Earth Obs. Geoinformation, 2010)

A 4-channel 10.3Gb/s transceiver with adaptive phase equalizer for 4-to-41dB loss PCB channel. - Yasuo Hidaka; Takeshi Horie; Yoichi Koyanagi; Takashi Miyoshi; Hideki Osone; Samir Parikh; Subodh M. Reddy; Toshiyuki Shibuya; Yasushi Umezawa; William W. Walker (ISSCC, 2011)