The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration. - Takeshi Ohkawa; Toshiyuki Nozawa; Masanori Fujibayashi; Naoto Miyamoto; Leo Karnan; Soichiro Kita; Koji Kotani; Tadahiro Ohmi (ASP-DAC, 2004)

An approach to realize time-sharing of flip-flops in time-multiplexed FPGAs. - Md. Ashfaquzzaman Khan; Naoto Miyamoto; Takeshi Ohkawa; Amir Jamak; Soichiro Kita; Koji Kotani; Tadahiro Ohmi (FPT, 2004)

A Cascaded Folding ADC Based on Fast-Settling 3-Degree Folders with Enhanced Reset Technique. - Koichi Ono; Takeshi Ohkawa; Masahiro Segami; Masao Hotta (IEICE Trans. Electron., 2010)

COOL interconnect low power interconnection technology for scalable 3D LSI design. - Marco Chacin; Hiroyuki Uchida; Michiya Hagimoto; Takashi Miyazaki; Takeshi Ohkawa; Rimon Ikeno; Yukoh Matsumoto; Fumito Imura; Motohiro Suzuki; Katsuya Kikuchi; Hiroshi Nakagawa; Masahiro Aoyagi (COOL Chips, 2011)

Comparative Study of Path Prediction Method for Speculative Loop Execution. - Kazuhiro Kinkai; Takanobu Baba; Hiroyoshi Jutori; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (ICNC, 2012)

Proposal of Incremental Software Simulation for Reduction of Evaluation Time. - Atsushi Shina; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota; Takanobu Baba (ICNC, 2012)

A prototyping system for hardware distributed objects with diversity of programming languages design and preliminary evaluation. - Takeshi Ohkawa; Takashi Yokota; Kanemitsu Ootsu (FPT, 2013)

Runtime Overhead Reduction in Automated Parallel Processing System Using Valgrind. - Takayuki Hoshi; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2013)

Exploration of Highly Accurate Path Prediction Mechanism Using Detailed Path History. - Hiroyoshi Jutori; Takanobu Baba; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2013)

Efficient Data Communication Using Dynamic Switching of Compression Method. - Masayuki Omote; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2013)

A Cellular Automata Approach for Large-Scale Interconnection Network Simulation. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2013)

Reconfigurable and hardwired ORB engine on FPGA by Java-to-HDL synthesizer for realtime application. - Takeshi Ohkawa; Daichi Uetake; Takashi Yokota; Kanemitsu Ootsu; Takanobu Baba (SIGARCH Comput. Archit. News, 2013)

Proposal of Highly Efficient Memory Access Method Using Locked-Cache on Soft-Core Processor with SIMD Operations. - Kosuke Hiraishi; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2015)

Efficient Translation and Execution Method for Automated Parallel Processing System by Using Valgrind. - Hiroyuki Obuchi; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2015)

Performance Improvement of Large-Scale Interconnection Network Simulator by Using GPU. - Yuki Suzuki; Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2015)

Entropy Throttling: Towards Global Congestion Control of Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2015)

An Android cluster system capable of dynamic node reconfiguration. - Yuki Sawada; Yusuke Arai; Kanemitsu Ootsu; Takashi Yokota; Takeshi Ohkawa (ICUFN, 2015)

Empirical performance study of speculative parallel processing on commercial multi-core CPU with hardware transactional memory. - Kanemitsu Ootsu; Yutaka Matsuno; Takeshi Ohkawa; Takashi Yokota; Takanobu Baba (SEPS@SPLASH, 2015)

Proposal of ROS-compliant FPGA Component for Low-Power Robotic Systems. - Kazushi Yamashina; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota (CoRR, 2015)

Relaxing Heavy Congestion by State Propagation. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (J. Inf. Process., 2015)

Introducing PSO for Optimal Packet Scheduling of Collective Communication. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2016)

cReComp: Automated Design Tool for ROS-Compliant FPGA Component. - Kazushi Yamashina; Hitomi Kimura; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota (MCSoC, 2016)

Architecture exploration of intelligent robot system using ros-compliant FPGA component. - Takeshi Ohkawa; Kazushi Yamashina; Takuya Matsumoto; Kanemitsu Ootsu; Takashi Yokota (RSP, 2016)

Enhancing Entropy Throttling: New Classes of Injection Control in Interconnection Networks. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2016)

Acceleration of Publish/Subscribe Messaging in ROS-compliant FPGA Component. - Yuhei Sugata; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota (HEART, 2017)

A Translation Method of ARM Machine Code to LLVM-IR for Binary Code Parallelization and Optimization. - Kohta Shigenobu; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR, 2017)

Acceleration of Large-Scale CGH Generation Using Multi-GPU Cluster. - Shinpei Watanabe; Boaz Jessie Jackin; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai; Takanobu Baba (CANDAR, 2017)

Large-Scale Interconnection Network Simulation Methods Based on Cellular Automata. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (CANDAR, 2017)

Designing Efficient Parallel Processing in 3D Standard-Chip Stacking System with Standard Bus. - Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota; Katsuya Kikuchi; Masahiro Aoyagi (MCSoC, 2017)

A Static Packet Scheduling Approach for Fast Collective Communication by Using PSO. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2017)

Performance of Android Cluster System Allowing Dynamic Node Reconfiguration. - Yuki Sawada; Yusuke Arai; Kanemitsu Ootsu; Takashi Yokota; Takeshi Ohkawa (Wirel. Pers. Commun., 2017)

Development of a Robot Car by Single Line Search Method for White Line Detection with FPGA. - Hiromichi Wakatsuki; Takao Kido; Kenta Arai; Yuhei Sugata; Kanemitsu Ootsu; Takashi Yokota; Takeshi Ohkawa (FPT, 2018)

An Implementation of LLVM Pass for Loop Parallelization Based on IR-Level Directives. - Kengo Jingu; Kohta Shigenobu; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (CANDAR Workshops, 2018)

Data Distribution Method for Fast Giga-scale Hologram Generation on a Multi-GPU Cluster. - Takanobu Baba; Shinpei Watanabe; Boaz Jessie Jackin; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai (ApPLIED@PODC, 2018)

Overcoming the difficulty of large-scale CGH generation on multi-GPU cluster. - Takanobu Baba; Shinpei Watanabe; Boaz Jessie Jackin; Takeshi Ohkawa; Kanemitsu Ootsu; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai (GPGPU@PPoPP, 2018)

FPGA Components for Integrating FPGAs into Robot Systems. - Takeshi Ohkawa; Kazushi Yamashina; Hitomi Kimura; Kanemitsu Ootsu; Takashi Yokota (IEICE Trans. Inf. Syst., 2018)

A Genetic Approach for Accelerating Communication Performance by Node Mapping. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2018)

Realization and Preliminary Evaluation of MPI Runtime Environment on Android Cluster. - Masahiro Nissato; Hiroki Sugiyama; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (AINA, 2019)

Design and Development of Networked Multiple FPGA Components for Autonomous Tiny Robot Car. - Takeshi Ohkawa; Shotaro Tayama; Hayato Mori; Dohyung Lee; Hayato Amano; Itsuki Hirakawa; Mikiko Sato; Harumi Watanabe (FPT, 2019)

High level synthesis of ROS protocol interpretation and communication circuit for FPGA. - Takeshi Ohkawa; Yuhei Sugata; Harumi Watanabe; Nobuhiko Ogura; Kanemitsu Ootsu; Takashi Yokota (RoSE@ICSE, 2019)

Prototype of FPGA Dynamic Reconfiguration Based-on Context-Oriented Programming. - Takeshi Ohkawa; Ikuta Tanigawa; Mikiko Sato; Kenji Hisazumi; Nobuhiko Ogura; Harumi Watanabe (MCSoC, 2019)

Directive-Based Parallelization of For-Loops at LLVM IR Level. - Kengo Jingu; Kohta Shigenobu; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota (SNPD, 2019)

Fast Computation with Efficient Object Data Distribution for Large-Scale Hologram Generation on a Multi-GPU Cluster. - Takanobu Baba; Shinpei Watanabe; Boaz Jessie Jackin; Kanemitsu Ootsu; Takeshi Ohkawa; Takashi Yokota; Yoshio Hayasaki; Toyohiko Yatagai (IEICE Trans. Inf. Syst., 2019)

Automatic Generation Tool of FPGA Components for Robots. - Takeshi Ohkawa; Kazushi Yamashina; Takuya Matsumoto; Kanemitsu Ootsu; Takashi Yokota (IEICE Trans. Inf. Syst., 2019)

Accelerating Large-Scale Interconnection Network Simulation by Cellular Automata Concept. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2019)

FPGA Acceleration of ROS2-Based Reinforcement Learning Agents. - Daniel Pinheiro Leal; Midori Sugaya; Hideharu Amano; Takeshi Ohkawa (CANDAR (Workshops), 2020)

Automated Integration of High-Level Synthesis FPGA Modules with ROS2 Systems. - Daniel Pinheiro Leal; Midori Sugaya; Hideharu Amano; Takeshi Ohkawa (FPT, 2020)

Genetic Node-Mapping Methods for Rapid Collective Communications. - Takashi Yokota; Kanemitsu Ootsu; Takeshi Ohkawa (IEICE Trans. Inf. Syst., 2020)

Power Consumption Reduction Method and Edge Offload Server for Multiple Robots. - Sannomiya Natsuho; Takeshi Ohkawa; Hideharu Amano; Midori Sugaya (EDGE, 2021)

A dataset generation for object recognition and a tool for generating ROS2 FPGA node. - Hayato Amano; Hayato Mori; Akinobu Mizutani; Tomohiro Ono; Yuma Yoshimoto; Takeshi Ohkawa; Hakaru Tamukoh (FPT, 2021)

Layer Modeling and Its Code Generation based on Context-oriented Programming. - Chinatsu Yamamoto; Ikuta Tanigawa; Kenji Hisazumi; Mikiko Sato; Takeshi Ohkawa; Nobuhiko Ogura; Harumi Watanabe (MODELSWARD, 2021)

Fogcached-Ros: DRAM/NVMM Hybrid KVS Server with ROS Based Extension for ROS Application and SLAM Evaluation. - Koki Higashi; Yoichi Ishiwata; Takeshi Ohkawa; Midori Sugaya (IEICE Trans. Inf. Syst., 2021)

Desgin and Implementation of ROS2-based Autonomous Tiny Robot Car with Integration of Multiple ROS2 FPGA Nodes. - Hayato Mori; Hayato Amano; Akinobu Mizutani; Eisuke Okazaki; Yuki Konno; Kohei Sada; Tomohiro Ono; Yuma Yoshimoto; Hakaru Tamukoh; Takeshi Ohkawa; Midori Sugaya (FPT, 2022)

FPGA-Based Control of Remote Robotic Hands and ROS2 Integration. - Ludi Wang; Takeshi Ohkawa (CANDARW, 2022)

IoT Edge Server ROS Node Allocation Method for Multi-SLAM on Many-core. - Masato Fukui; Yoichi Ishiwata; Takeshi Ohkawa; Midori Sugaya (PerCom Workshops, 2022)

FPGA Emulation of Through-Silicon-Via (TSV) Dataflow Network for 3D Standard Chip Stacking System. - Takeshi Ohkawa; Masahiro Aoyagi (COOL CHIPS, 2023)

Offloading Image Recognition Processing for Care Robots to FPGA on Multi-access Edge Computing. - Hayato Mori; Eisuke Okazaki; Gai Nagahashi; Mikiko Sato; Takeshi Ohkawa; Midori Sugaya (ICFPT, 2023)

APRIS Robot Challenge: Collaborative Online Interdisciplinary and International Learning for IoT/Robotics Systems. - Kenji Hisazumi; Takeshi Ohkawa; Masafumi Miwa; Mikiko Sato; Takashi Nagai; Nobuhiro Ohe; Kittikhun Thongpull; Nattha Jindapetch; Harumi Watanabe (EDUCON, 2024)

Alchemist: A Component-Oriented Development Tool of FPGA based on Publish/Subscribe Model. - Takeshi Ohkawa; Kenta Arai; Kanemitsu Ootsu; Takashi Yokota (ICCE, 2024)

ROS 2-Integrated Low-Latency Remote Force Feedback System Using FPGA-Accelerated FOC Control and Inverse Kinematics. - Ludi Wang; Takeshi Ohkawa (HEART, 2025)