Optimizing the DRAM refresh count for merged DRAM/logic LSIs. - Taku Ohsawa; Koji Kai; Kazuaki J. Murakami (ISLPED, 1998)

Pinot: Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities. - Taku Ohsawa; Masamichi Takagi; Shoji Kawahara; Satoshi Matsushita (MICRO, 2005)

An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques. - Masahiro Nomura; Taku Ohsawa; Koichi Takeda 001; Yoetsu Nakazawa; Yoshinori Hirota; Yasuhiko Hagihara; Naoki Nishi (IEICE Trans. Electron., 2006)

Low power architecture and design techniques for mobile handset LSI MedityTM M2. - Shuichi Kunie; Takefumi Hiraga; Tatsuya Tokue; Sunao Torii; Taku Ohsawa (ASP-DAC, 2008)